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Recognize vst1.64 / vld1.64 with 3 and 4 regs as load from / store to stack stuff

(this corresponds by spilling/reloading regs in DTriple / DQuad reg classes).
No testcase, found by inspection.

llvm-svn: 161300
This commit is contained in:
Anton Korobeynikov 2012-08-04 13:22:14 +00:00
parent 6dd5c91aae
commit dca34647bc

View File

@ -888,6 +888,8 @@ ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr *MI,
} }
break; break;
case ARM::VST1q64: case ARM::VST1q64:
case ARM::VST1d64TPseudo:
case ARM::VST1d64QPseudo:
if (MI->getOperand(0).isFI() && if (MI->getOperand(0).isFI() &&
MI->getOperand(2).getSubReg() == 0) { MI->getOperand(2).getSubReg() == 0) {
FrameIndex = MI->getOperand(0).getIndex(); FrameIndex = MI->getOperand(0).getIndex();
@ -1056,6 +1058,8 @@ ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
} }
break; break;
case ARM::VLD1q64: case ARM::VLD1q64:
case ARM::VLD1d64TPseudo:
case ARM::VLD1d64QPseudo:
if (MI->getOperand(1).isFI() && if (MI->getOperand(1).isFI() &&
MI->getOperand(0).getSubReg() == 0) { MI->getOperand(0).getSubReg() == 0) {
FrameIndex = MI->getOperand(1).getIndex(); FrameIndex = MI->getOperand(1).getIndex();