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[mips] Fix return lowering
Fix a machine verifier issue where a instruction was using a invalid register. The return pseudo is expanded and has the return address register added to it. The return register may have been spuriously mark as killed earlier. This partially resolves PR/27458 Thanks to Quentin Colombet for reporting the issue! llvm-svn: 297372
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@ -540,11 +540,20 @@ unsigned MipsSEInstrInfo::getAnalyzableBrOpc(unsigned Opc) const {
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void MipsSEInstrInfo::expandRetRA(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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MachineInstrBuilder MIB;
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if (Subtarget.isGP64bit())
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BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
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.addReg(Mips::RA_64);
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MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn64))
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.addReg(Mips::RA_64, RegState::Undef);
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else
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BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn)).addReg(Mips::RA);
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MIB = BuildMI(MBB, I, I->getDebugLoc(), get(Mips::PseudoReturn))
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.addReg(Mips::RA, RegState::Undef);
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// Retain any imp-use flags.
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for (auto & MO : I->operands()) {
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if (MO.isImplicit())
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MIB.add(MO);
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}
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}
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void MipsSEInstrInfo::expandERet(MachineBasicBlock &MBB,
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@ -1,4 +1,4 @@
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; RUN: llc -march=mipsel < %s | FileCheck %s
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; RUN: llc -march=mipsel -verify-machineinstrs < %s | FileCheck %s
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define i8* @f1() nounwind {
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entry:
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@ -1,4 +1,4 @@
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; RUN: llc -march=mipsel < %s | FileCheck %s
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; RUN: llc -march=mipsel < %s -verify-machineinstrs | FileCheck %s
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define void @tnaked() #0 {
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