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[CodeGen] Reduce visibility of implementation details

NFC.

llvm-svn: 241164
This commit is contained in:
Benjamin Kramer 2015-07-01 14:47:39 +00:00
parent 4771453f17
commit dcff586d10
8 changed files with 11 additions and 11 deletions

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@ -33,7 +33,7 @@ namespace llvm {
class RegisterClassInfo;
/// Contains all the state necessary for anti-dep breaking.
class AggressiveAntiDepState {
class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepState {
public:
/// Information about a register reference within a liverange
typedef struct {
@ -108,8 +108,8 @@ class RegisterClassInfo;
bool IsLive(unsigned Reg);
};
class AggressiveAntiDepBreaker : public AntiDepBreaker {
class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepBreaker
: public AntiDepBreaker {
MachineFunction& MF;
MachineRegisterInfo &MRI;
const TargetInstrInfo *TII;

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@ -25,7 +25,7 @@ namespace llvm {
class RegisterClassInfo;
class VirtRegMap;
class AllocationOrder {
class LLVM_LIBRARY_VISIBILITY AllocationOrder {
SmallVector<MCPhysReg, 16> Hints;
ArrayRef<MCPhysReg> Order;
int Pos;

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@ -27,7 +27,7 @@ namespace llvm {
/// This class works in conjunction with the post-RA scheduler to rename
/// registers to break register anti-dependencies (WAR hazards).
class AntiDepBreaker {
class LLVM_LIBRARY_VISIBILITY AntiDepBreaker {
public:
typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
DbgValueVector;

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@ -24,7 +24,7 @@ namespace llvm {
class TargetInstrInfo;
class TargetRegisterInfo;
class BranchFolder {
class LLVM_LIBRARY_VISIBILITY BranchFolder {
public:
explicit BranchFolder(bool defaultEnableTailMerge, bool CommonHoist,
const MachineBlockFrequencyInfo &MBFI,

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@ -31,7 +31,7 @@ class RegisterClassInfo;
class TargetInstrInfo;
class TargetRegisterInfo;
class CriticalAntiDepBreaker : public AntiDepBreaker {
class LLVM_LIBRARY_VISIBILITY CriticalAntiDepBreaker : public AntiDepBreaker {
MachineFunction& MF;
MachineRegisterInfo &MRI;
const TargetInstrInfo *TII;

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@ -21,7 +21,7 @@ namespace llvm {
class LiveIntervals;
class InterferenceCache {
class LLVM_LIBRARY_VISIBILITY InterferenceCache {
const TargetRegisterInfo *TRI;
LiveIntervalUnion *LIUArray;
MachineFunction *MF;

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@ -31,7 +31,7 @@ class LiveInterval;
class LiveIntervals;
class VirtRegMap;
class LiveDebugVariables : public MachineFunctionPass {
class LLVM_LIBRARY_VISIBILITY LiveDebugVariables : public MachineFunctionPass {
void *pImpl;
DenseMap<const Function *, DISubprogram *> FunctionDIs;

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@ -39,7 +39,7 @@ class raw_ostream;
/// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
/// opportunities.
class SplitAnalysis {
class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
public:
const MachineFunction &MF;
const VirtRegMap &VRM;
@ -208,7 +208,7 @@ public:
/// - Finish the current interval with closeIntv and repeat from 2.
/// - Rewrite instructions with finish().
///
class SplitEditor {
class LLVM_LIBRARY_VISIBILITY SplitEditor {
SplitAnalysis &SA;
LiveIntervals &LIS;
VirtRegMap &VRM;