RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
Code Issues Projects Releases Wiki Activity

[X86] Regenerate MMX coalescing test

Browse Source 
Exposes another extractelement(bitcast(scalartovector())) pattern

llvm-svn: 343403
This commit is contained in:
Simon Pilgrim 2018-09-30 09:42:04 +00:00
parent df0889e93a
commit dd1c35c05a
1 changed files with 26 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
test/CodeGen/X86/mmx-coalescing.ll
View File

@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s
%SA = type <{ %union.anon, i32, [4 x i8], i8*, i8*, i8*, i32, [4 x i8] }>
@ -6,13 +7,32 @@
; Check that extra movd (copy) instructions aren't generated.
define i32 @test(%SA* %pSA, i16* %A, i32 %B, i32 %C, i32 %D, i8* %E) {
; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pshufw $238, (%rdi), %mm0 # mm0 = mem[2,3,2,3]
; CHECK-NEXT: movd %mm0, %eax
; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB0_1
; CHECK-NEXT: # %bb.2: # %if.B
; CHECK-NEXT: pshufw $238, %mm0, %mm0 # mm0 = mm0[2,3,2,3]
; CHECK-NEXT: movq %mm0, %rax
; CHECK-NEXT: jmp .LBB0_3
; CHECK-NEXT: .LBB0_1: # %if.A
; CHECK-NEXT: movd %edx, %mm1
; CHECK-NEXT: psllq %mm1, %mm0
; CHECK-NEXT: movq %mm0, %rax
; CHECK-NEXT: testq %rax, %rax
; CHECK-NEXT: jne .LBB0_4
; CHECK-NEXT: .LBB0_3: # %if.C
; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB0_1
; CHECK-NEXT: .LBB0_4: # %merge
; CHECK-NEXT: pshufw $238, %mm0, %mm0 # mm0 = mm0[2,3,2,3]
; CHECK-NEXT: movd %mm0, %eax
; CHECK-NEXT: retq
entry:
; CHECK-LABEL: test
; CHECK: # %bb.0:
; CHECK-NEXT: pshufw
; CHECK-NEXT: movd
; CHECK-NOT: movd
; CHECK-NEXT: testl
%shl = shl i32 1, %B
%shl1 = shl i32 %C, %B
%shl2 = shl i32 1, %D
@ -36,9 +56,6 @@ entry:
br i1 %cmp, label %if.A, label %if.B
if.A:
; CHECK: %if.A
; CHECK-NEXT: movd
; CHECK-NEXT: psllq
%pa = phi <1 x i64> [ %v8, %entry ], [ %vx, %if.C ]
%v17 = extractelement <1 x i64> %pa, i32 0
%v18 = bitcast i64 %v17 to x86_mmx
@ -64,9 +81,6 @@ if.C:
br i1 %cmp2, label %if.A, label %merge
merge:
; CHECK: %merge
; CHECK-NOT: movd
; CHECK-NEXT: pshufw
%vy = phi <1 x i64> [ %v21, %if.A ], [ %vx, %if.C ]
%v130 = bitcast <1 x i64> %vy to <4 x i16>
%v131 = bitcast <4 x i16> %v130 to x86_mmx