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Delete le32/le64 targets

Browse Source 
They are unused now.

Note: NaCl is still used and is currently expected to be needed until 2022-06
(https://blog.chromium.org/2020/08/changes-to-chrome-app-support-timeline.html).

Differential Revision: https://reviews.llvm.org/D100981
This commit is contained in:
Fangrui Song 2021-04-21 18:44:12 -07:00
parent 2faffc9dab
commit dd466a7214
5 changed files with 0 additions and 43 deletions
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2
include/llvm/ADT/Triple.h
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@ -85,8 +85,6 @@ public:
xcore, // XCore: xcore
nvptx, // NVPTX: 32-bit
nvptx64, // NVPTX: 64-bit
le32, // le32: generic little-endian 32-bit CPU (PNaCl)
le64, // le64: generic little-endian 64-bit CPU (PNaCl)
amdil, // AMDIL
amdil64, // AMDIL with 64-bit pointers
hsail, // AMD HSAIL

21
lib/Support/Triple.cpp
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@ -42,8 +42,6 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case hsail: return "hsail";
case kalimba: return "kalimba";
case lanai: return "lanai";
case le32: return "le32";
case le64: return "le64";
case m68k: return "m68k";
case mips64: return "mips64";
case mips64el: return "mips64el";
@ -136,9 +134,6 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
case nvptx: return "nvvm";
case nvptx64: return "nvvm";
case le32: return "le32";
case le64: return "le64";
case amdil:
case amdil64: return "amdil";
@ -315,8 +310,6 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("xcore", xcore)
.Case("nvptx", nvptx)
.Case("nvptx64", nvptx64)
.Case("le32", le32)
.Case("le64", le64)
.Case("amdil", amdil)
.Case("amdil64", amdil64)
.Case("hsail", hsail)
@ -448,8 +441,6 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Case("xcore", Triple::xcore)
.Case("nvptx", Triple::nvptx)
.Case("nvptx64", Triple::nvptx64)
.Case("le32", Triple::le32)
.Case("le64", Triple::le64)
.Case("amdil", Triple::amdil)
.Case("amdil64", Triple::amdil64)
.Case("hsail", Triple::hsail)
@ -709,8 +700,6 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
case Triple::hsail:
case Triple::kalimba:
case Triple::lanai:
case Triple::le32:
case Triple::le64:
case Triple::m68k:
case Triple::mips64:
case Triple::mips64el:
@ -1284,7 +1273,6 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::hsail:
case llvm::Triple::kalimba:
case llvm::Triple::lanai:
case llvm::Triple::le32:
case llvm::Triple::m68k:
case llvm::Triple::mips:
case llvm::Triple::mipsel:
@ -1314,7 +1302,6 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::bpfeb:
case llvm::Triple::bpfel:
case llvm::Triple::hsail64:
case llvm::Triple::le64:
case llvm::Triple::mips64:
case llvm::Triple::mips64el:
case llvm::Triple::nvptx64:
@ -1369,7 +1356,6 @@ Triple Triple::get32BitArchVariant() const {
case Triple::hsail:
case Triple::kalimba:
case Triple::lanai:
case Triple::le32:
case Triple::m68k:
case Triple::mips:
case Triple::mipsel:
@ -1397,7 +1383,6 @@ Triple Triple::get32BitArchVariant() const {
case Triple::aarch64_be: T.setArch(Triple::armeb); break;
case Triple::amdil64: T.setArch(Triple::amdil); break;
case Triple::hsail64: T.setArch(Triple::hsail); break;
case Triple::le64: T.setArch(Triple::le32); break;
case Triple::mips64: T.setArch(Triple::mips); break;
case Triple::mips64el: T.setArch(Triple::mipsel); break;
case Triple::nvptx64: T.setArch(Triple::nvptx); break;
@ -1441,7 +1426,6 @@ Triple Triple::get64BitArchVariant() const {
case Triple::bpfeb:
case Triple::bpfel:
case Triple::hsail64:
case Triple::le64:
case Triple::mips64:
case Triple::mips64el:
case Triple::nvptx64:
@ -1463,7 +1447,6 @@ Triple Triple::get64BitArchVariant() const {
case Triple::arm: T.setArch(Triple::aarch64); break;
case Triple::armeb: T.setArch(Triple::aarch64_be); break;
case Triple::hsail: T.setArch(Triple::hsail64); break;
case Triple::le32: T.setArch(Triple::le64); break;
case Triple::mips: T.setArch(Triple::mips64); break;
case Triple::mipsel: T.setArch(Triple::mips64el); break;
case Triple::nvptx: T.setArch(Triple::nvptx64); break;
@ -1496,8 +1479,6 @@ Triple Triple::getBigEndianArchVariant() const {
case Triple::hsail64:
case Triple::hsail:
case Triple::kalimba:
case Triple::le32:
case Triple::le64:
case Triple::msp430:
case Triple::nvptx64:
case Triple::nvptx:
@ -1586,8 +1567,6 @@ bool Triple::isLittleEndian() const {
case Triple::hsail64:
case Triple::hsail:
case Triple::kalimba:
case Triple::le32:
case Triple::le64:
case Triple::mips64el:
case Triple::mipsel:
case Triple::msp430:

3
test/CodeGen/Generic/no-target.ll
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@ -1,3 +0,0 @@
; RUN: not llc -mtriple le32-unknown-nacl %s -o - 2>&1 | FileCheck %s
; CHECK: error: unable to get target for 'le32-unknown-nacl'

16
unittests/ADT/TripleTest.cpp
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@ -1044,14 +1044,6 @@ TEST(TripleTest, BitWidthArchVariants) {
EXPECT_EQ(Triple::renderscript32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::renderscript64, T.get64BitArchVariant().getArch());
T.setArch(Triple::le32);
EXPECT_EQ(Triple::le32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::le64, T.get64BitArchVariant().getArch());
T.setArch(Triple::le64);
EXPECT_EQ(Triple::le32, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::le64, T.get64BitArchVariant().getArch());
T.setArch(Triple::armeb);
EXPECT_EQ(Triple::armeb, T.get32BitArchVariant().getArch());
EXPECT_EQ(Triple::aarch64_be, T.get64BitArchVariant().getArch());
@ -1166,14 +1158,6 @@ TEST(TripleTest, EndianArchVariants) {
EXPECT_EQ(Triple::tce, T.getBigEndianArchVariant().getArch());
EXPECT_EQ(Triple::tcele, T.getLittleEndianArchVariant().getArch());
T.setArch(Triple::le32);
EXPECT_EQ(Triple::UnknownArch, T.getBigEndianArchVariant().getArch());
EXPECT_EQ(Triple::le32, T.getLittleEndianArchVariant().getArch());
T.setArch(Triple::le64);
EXPECT_EQ(Triple::UnknownArch, T.getBigEndianArchVariant().getArch());
EXPECT_EQ(Triple::le64, T.getLittleEndianArchVariant().getArch());
T.setArch(Triple::csky);
EXPECT_EQ(Triple::UnknownArch, T.getBigEndianArchVariant().getArch());
EXPECT_EQ(Triple::csky, T.getLittleEndianArchVariant().getArch());

1
utils/gn/secondary/clang/lib/Basic/BUILD.gn
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@ -93,7 +93,6 @@ static_library("Basic") {
"Targets/BPF.cpp",
"Targets/Hexagon.cpp",
"Targets/Lanai.cpp",
"Targets/Le64.cpp",
"Targets/M68k.cpp",
"Targets/MSP430.cpp",
"Targets/Mips.cpp",