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fix PR8514, a bug where the "heroic" transformation of shift/and
into and/shift would cause nodes to move around and a dangling pointer to happen. The code tried to avoid this with a HandleSDNode, but got the details wrong. llvm-svn: 123578
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@ -933,24 +933,18 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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// Add an artificial use to this node so that we can keep track of
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// it if it gets CSE'd with a different node.
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HandleSDNode Handle(N);
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SDValue LHS = Handle.getValue().getNode()->getOperand(0);
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SDValue RHS = Handle.getValue().getNode()->getOperand(1);
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X86ISelAddressMode Backup = AM;
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if (!MatchAddressRecursively(LHS, AM, Depth+1) &&
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!MatchAddressRecursively(RHS, AM, Depth+1))
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if (!MatchAddressRecursively(N.getOperand(0), AM, Depth+1) &&
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!MatchAddressRecursively(Handle.getValue().getOperand(1), AM, Depth+1))
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return false;
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AM = Backup;
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LHS = Handle.getValue().getNode()->getOperand(0);
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RHS = Handle.getValue().getNode()->getOperand(1);
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// Try again after commuting the operands.
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if (!MatchAddressRecursively(RHS, AM, Depth+1) &&
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!MatchAddressRecursively(LHS, AM, Depth+1))
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if (!MatchAddressRecursively(Handle.getValue().getOperand(1), AM, Depth+1)&&
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!MatchAddressRecursively(Handle.getValue().getOperand(0), AM, Depth+1))
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return false;
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AM = Backup;
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LHS = Handle.getValue().getNode()->getOperand(0);
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RHS = Handle.getValue().getNode()->getOperand(1);
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// If we couldn't fold both operands into the address at the same time,
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// see if we can just put each operand into a register and fold at least
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@ -958,11 +952,13 @@ bool X86DAGToDAGISel::MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
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if (AM.BaseType == X86ISelAddressMode::RegBase &&
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!AM.Base_Reg.getNode() &&
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!AM.IndexReg.getNode()) {
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AM.Base_Reg = LHS;
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AM.IndexReg = RHS;
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N = Handle.getValue();
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AM.Base_Reg = N.getOperand(0);
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AM.IndexReg = N.getOperand(1);
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AM.Scale = 1;
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return false;
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}
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N = Handle.getValue();
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break;
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}
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@ -151,3 +151,39 @@ entry:
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ret i32 %cond
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}
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; PR8514 - Crash in match address do to "heroics" turning and-of-shift into
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; shift of and.
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%struct.S0 = type { i8, [2 x i8], i8 }
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define void @func_59(i32 %p_63) noreturn nounwind {
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entry:
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br label %for.body
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for.body: ; preds = %for.inc44, %entry
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%p_63.addr.1 = phi i32 [ %p_63, %entry ], [ 0, %for.inc44 ]
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%l_74.0 = phi i32 [ 0, %entry ], [ %add46, %for.inc44 ]
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br i1 undef, label %for.inc44, label %bb.nph81
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bb.nph81: ; preds = %for.body
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%tmp98 = add i32 %p_63.addr.1, 0
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br label %for.body22
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for.body22: ; preds = %for.body22, %bb.nph81
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%l_75.077 = phi i64 [ %ins, %for.body22 ], [ undef, %bb.nph81 ]
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%tmp110 = trunc i64 %l_75.077 to i32
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%tmp111 = and i32 %tmp110, 65535
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%arrayidx32.0 = getelementptr [9 x [5 x [2 x %struct.S0]]]* undef, i32 0, i32 %l_74.0, i32 %tmp98, i32 %tmp111, i32 0
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store i8 1, i8* %arrayidx32.0, align 4
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%tmp106 = shl i32 %tmp110, 2
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%tmp107 = and i32 %tmp106, 262140
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%scevgep99.sum114 = or i32 %tmp107, 1
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%arrayidx32.1.1 = getelementptr [9 x [5 x [2 x %struct.S0]]]* undef, i32 0, i32 %l_74.0, i32 %tmp98, i32 0, i32 1, i32 %scevgep99.sum114
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store i8 0, i8* %arrayidx32.1.1, align 1
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%ins = or i64 undef, undef
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br label %for.body22
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for.inc44: ; preds = %for.body
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%add46 = add i32 %l_74.0, 1
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br label %for.body
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}
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