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[X86] Fix shuffle decoding for variable VPERMIL to be tolerant of the Constant type not matching due to folding in the constant pool and to get VPERMILPD correct.

llvm-svn: 256433
This commit is contained in:
Craig Topper 2015-12-26 04:50:07 +00:00
parent bf05e5eef9
commit de07308c81
3 changed files with 63 additions and 33 deletions

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@ -388,44 +388,66 @@ void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) {
} }
} }
void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) { void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask) {
Type *MaskTy = C->getType(); Type *MaskTy = C->getType();
assert(MaskTy->isVectorTy() && "Expected a vector constant mask!"); // It is not an error for the PSHUFB mask to not be a vector of i8 because the
assert(MaskTy->getVectorElementType()->isIntegerTy() && // constant pool uniques constants by their bit representation.
"Expected integer constant mask elements!"); // e.g. the following take up the same space in the constant pool:
int ElementBits = MaskTy->getScalarSizeInBits(); // i128 -170141183420855150465331762880109871104
int NumElements = MaskTy->getVectorNumElements(); //
// <2 x i64> <i64 -9223372034707292160, i64 -9223372034707292160>
//
// <4 x i32> <i32 -2147483648, i32 -2147483648,
// i32 -2147483648, i32 -2147483648>
unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
if (MaskTySize != 128 && MaskTySize != 256) // FIXME: Add support for AVX-512.
return;
// Only support vector types.
if (!MaskTy->isVectorTy())
return;
// Make sure its an integer type.
Type *VecEltTy = MaskTy->getVectorElementType();
if (!VecEltTy->isIntegerTy())
return;
// Support any element type from byte up to element size.
// This is necesary primarily because 64-bit elements get split to 32-bit
// in the constant pool on 32-bit target.
unsigned EltTySize = VecEltTy->getIntegerBitWidth();
if (EltTySize < 8 || EltTySize > ElSize)
return;
unsigned NumElements = MaskTySize / ElSize;
assert((NumElements == 2 || NumElements == 4 || NumElements == 8) && assert((NumElements == 2 || NumElements == 4 || NumElements == 8) &&
"Unexpected number of vector elements."); "Unexpected number of vector elements.");
ShuffleMask.reserve(NumElements); ShuffleMask.reserve(NumElements);
if (auto *CDS = dyn_cast<ConstantDataSequential>(C)) { unsigned NumElementsPerLane = 128 / ElSize;
assert((unsigned)NumElements == CDS->getNumElements() && unsigned Factor = ElSize / EltTySize;
"Constant mask has a different number of elements!");
for (int i = 0; i < NumElements; ++i) { for (unsigned i = 0; i < NumElements; ++i) {
int Base = (i * ElementBits / 128) * (128 / ElementBits); Constant *COp = C->getAggregateElement(i * Factor);
uint64_t Element = CDS->getElementAsInteger(i); if (!COp) {
// Only the least significant 2 bits of the integer are used. ShuffleMask.clear();
int Index = Base + (Element & 0x3); return;
ShuffleMask.push_back(Index); } else if (isa<UndefValue>(COp)) {
} ShuffleMask.push_back(SM_SentinelUndef);
} else if (auto *CV = dyn_cast<ConstantVector>(C)) { continue;
assert((unsigned)NumElements == C->getNumOperands() &&
"Constant mask has a different number of elements!");
for (int i = 0; i < NumElements; ++i) {
int Base = (i * ElementBits / 128) * (128 / ElementBits);
Constant *COp = CV->getOperand(i);
if (isa<UndefValue>(COp)) {
ShuffleMask.push_back(SM_SentinelUndef);
continue;
}
uint64_t Element = cast<ConstantInt>(COp)->getZExtValue();
// Only the least significant 2 bits of the integer are used.
int Index = Base + (Element & 0x3);
ShuffleMask.push_back(Index);
} }
int Index = i & ~(NumElementsPerLane - 1);
uint64_t Element = cast<ConstantInt>(COp)->getZExtValue();
if (ElSize == 64)
Index += (Element >> 1) & 0x1;
else
Index += Element & 0x3;
ShuffleMask.push_back(Index);
} }
// TODO: Handle funny-looking vectors too.
} }
void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl<int> &Mask) { void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl<int> &Mask) {

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@ -96,7 +96,8 @@ void decodeVSHUF64x2FamilyMask(MVT VT, unsigned Imm,
void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask); void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a VPERMILP variable mask from an IR-level vector constant. /// \brief Decode a VPERMILP variable mask from an IR-level vector constant.
void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask); void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask);
/// \brief Decode a zero extension instruction as a shuffle mask. /// \brief Decode a zero extension instruction as a shuffle mask.
void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT,

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@ -1303,9 +1303,16 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &SrcOp = MI->getOperand(1); const MachineOperand &SrcOp = MI->getOperand(1);
const MachineOperand &MaskOp = MI->getOperand(5); const MachineOperand &MaskOp = MI->getOperand(5);
unsigned ElSize;
switch (MI->getOpcode()) {
default: llvm_unreachable("Invalid opcode");
case X86::VPERMILPSrm: case X86::VPERMILPSYrm: ElSize = 32; break;
case X86::VPERMILPDrm: case X86::VPERMILPDYrm: ElSize = 64; break;
}
if (auto *C = getConstantFromPool(*MI, MaskOp)) { if (auto *C = getConstantFromPool(*MI, MaskOp)) {
SmallVector<int, 16> Mask; SmallVector<int, 16> Mask;
DecodeVPERMILPMask(C, Mask); DecodeVPERMILPMask(C, ElSize, Mask);
if (!Mask.empty()) if (!Mask.empty())
OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, Mask)); OutStreamer->AddComment(getShuffleComment(DstOp, SrcOp, Mask));
} }