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Fix a few more tests by encoding the extsb and other XForm11 instructions
correctly. llvm-svn: 18200
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@ -214,6 +214,23 @@ class XForm_base_r3xo<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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let Inst{31} = rc;
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let Inst{31} = rc;
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}
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}
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// This is the same as XForm_base_r3xo, but the first two operands are swapped
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// when code is emitted.
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class XForm_base_r3xo_swapped
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<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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dag OL, string asmstr>
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: I<opcode, ppc64, vmx, OL, asmstr> {
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bits<5> A;
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bits<5> RST;
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bits<5> B;
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let Inst{6-10} = RST;
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let Inst{11-15} = A;
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let Inst{16-20} = B;
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let Inst{21-30} = xo;
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let Inst{31} = rc;
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}
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class XForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
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class XForm_1<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
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dag OL, string asmstr>
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dag OL, string asmstr>
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@ -228,17 +245,7 @@ class XForm_5<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
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class XForm_6<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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class XForm_6<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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dag OL, string asmstr>
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dag OL, string asmstr>
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: I<opcode, ppc64, vmx, OL, asmstr> {
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: XForm_base_r3xo_swapped<opcode, xo, rc, ppc64, vmx, OL, asmstr>;
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bits<5> A;
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bits<5> RST;
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bits<5> B;
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let Inst{6-10} = RST;
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let Inst{11-15} = A;
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let Inst{16-20} = B;
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let Inst{21-30} = xo;
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let Inst{31} = rc;
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}
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class XForm_8<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
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class XForm_8<bits<6> opcode, bits<10> xo, bit ppc64, bit vmx,
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dag OL, string asmstr>
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dag OL, string asmstr>
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@ -251,7 +258,7 @@ class XForm_10<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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class XForm_11<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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class XForm_11<bits<6> opcode, bits<10> xo, bit rc, bit ppc64, bit vmx,
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dag OL, string asmstr>
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dag OL, string asmstr>
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: XForm_base_r3xo<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
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: XForm_base_r3xo_swapped<opcode, xo, rc, ppc64, vmx, OL, asmstr> {
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let B = 0;
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let B = 0;
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}
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}
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