RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
Code Issues Projects Releases Wiki Activity

[ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings

Browse Source 
Specify the Unpredictable bits, and return softfails when appropriate.

Patch by Mark Murray!

Differential revision: https://reviews.llvm.org/D66939

llvm-svn: 371374
This commit is contained in:
Oliver Stannard 2019-09-09 08:50:28 +00:00
parent b2c0945d93
commit dea81ecfaf
3 changed files with 50 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/ARMInstrMVE.td
View File

@ -373,6 +373,8 @@ class MVE_ScalarShiftSRegReg<string iname, bits<2> op5_4, list<dag> pattern=[]>
let Inst{7-6} = 0b00;
let Inst{5-4} = op5_4{1-0};
let Inst{3-0} = 0b1101;
let Unpredictable{8-6} = 0b111;
}
def MVE_SQRSHR : MVE_ScalarShiftSRegReg<"sqrshr", 0b10>;

6
lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -6483,6 +6483,12 @@ static DecodeStatus DecodeMVEOverlappingLongShift(
if (!Check(S, DecoderGPRRegisterClass(Inst, Rm, Address, Decoder)))
return MCDisassembler::Fail;
if (fieldFromInstruction (Insn, 6, 3) != 4)
return MCDisassembler::SoftFail;
if (Rda == Rm)
return MCDisassembler::SoftFail;
return S;
}

42
test/MC/Disassembler/ARM/mve-scalar-shift-unpredictable.txt Normal file
View File

@ -0,0 +1,42 @@
# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding %s 2> %t | FileCheck --check-prefix=CHECK %s
# RUN: FileCheck --check-prefix=STDERR < %t %s
[0x5e 0xea 0x6d 0xcf]
# CHECK: sqrshr lr, r12 @ encoding: [0x5e,0xea,0x2d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5e 0xea 0xad 0xcf]
# CHECK: sqrshr lr, r12 @ encoding: [0x5e,0xea,0x2d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5e 0xea 0xed 0xcf]
# CHECK: sqrshr lr, r12 @ encoding: [0x5e,0xea,0x2d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5e 0xea 0x2d 0xce]
# CHECK: sqrshr lr, r12 @ encoding: [0x5e,0xea,0x2d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x51 0xea 0x2d 0x1f]
# CHECK: sqrshr r1, r1 @ encoding: [0x51,0xea,0x2d,0x1f]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5e 0xea 0x4d 0xcf]
# CHECK: uqrshl lr, r12 @ encoding: [0x5e,0xea,0x0d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5b 0xea 0x8d 0xcf]
# CHECK: uqrshl r11, r12 @ encoding: [0x5b,0xea,0x0d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5e 0xea 0xcd 0xcf]
# CHECK: uqrshl lr, r12 @ encoding: [0x5e,0xea,0x0d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x5b 0xea 0x0d 0xce]
# CHECK: uqrshl r11, r12 @ encoding: [0x5b,0xea,0x0d,0xcf]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding
[0x53 0xea 0x0d 0x3f]
# CHECK: uqrshl r3, r3 @ encoding: [0x53,0xea,0x0d,0x3f]
# STDERR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding