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fixed a few typos in comments
llvm-svn: 211634
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@ -146,8 +146,8 @@ static const SDep *CriticalPathStep(const SUnit *SU) {
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void CriticalAntiDepBreaker::PrescanInstruction(MachineInstr *MI) {
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void CriticalAntiDepBreaker::PrescanInstruction(MachineInstr *MI) {
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// It's not safe to change register allocation for source operands of
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// It's not safe to change register allocation for source operands of
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// that have special allocation requirements. Also assume all registers
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// instructions that have special allocation requirements. Also assume all
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// used in a call must not be changed (ABI).
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// registers used in a call must not be changed (ABI).
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// FIXME: The issue with predicated instruction is more complex. We are being
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// FIXME: The issue with predicated instruction is more complex. We are being
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// conservative here because the kill markers cannot be trusted after
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// conservative here because the kill markers cannot be trusted after
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// if-conversion:
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// if-conversion:
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@ -309,7 +309,7 @@ void CriticalAntiDepBreaker::ScanInstruction(MachineInstr *MI,
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// the two-address instruction also defines NewReg, as may happen with
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// the two-address instruction also defines NewReg, as may happen with
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// pre/postincrement loads. In this case, both the use and def operands are in
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// pre/postincrement loads. In this case, both the use and def operands are in
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// RegRefs because the def is inserted by PrescanInstruction and not erased
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// RegRefs because the def is inserted by PrescanInstruction and not erased
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// during ScanInstruction. So checking for an instructions with definitions of
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// during ScanInstruction. So checking for an instruction with definitions of
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// both NewReg and AntiDepReg covers it.
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// both NewReg and AntiDepReg covers it.
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bool
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bool
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CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
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CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
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@ -325,7 +325,7 @@ CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
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if (RefOper->isDef() && RefOper->isEarlyClobber())
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if (RefOper->isDef() && RefOper->isEarlyClobber())
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return true;
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return true;
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// Handle cases in which this instructions defines NewReg.
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// Handle cases in which this instruction defines NewReg.
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MachineInstr *MI = RefOper->getParent();
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MachineInstr *MI = RefOper->getParent();
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &CheckOper = MI->getOperand(i);
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const MachineOperand &CheckOper = MI->getOperand(i);
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@ -343,11 +343,11 @@ CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
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return true;
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return true;
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// Don't allow an instruction using AntiDepReg to be earlyclobbered by
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// Don't allow an instruction using AntiDepReg to be earlyclobbered by
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// NewReg
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// NewReg.
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if (CheckOper.isEarlyClobber())
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if (CheckOper.isEarlyClobber())
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return true;
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return true;
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// Don't allow inline asm to define NewReg at all. Who know what it's
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// Don't allow inline asm to define NewReg at all. Who knows what it's
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// doing with it.
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// doing with it.
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if (MI->isInlineAsm())
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if (MI->isInlineAsm())
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return true;
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return true;
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@ -494,8 +494,7 @@ BreakAntiDependencies(const std::vector<SUnit>& SUnits,
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// as we go to help determine which registers are available.
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// as we go to help determine which registers are available.
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unsigned Broken = 0;
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unsigned Broken = 0;
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unsigned Count = InsertPosIndex - 1;
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unsigned Count = InsertPosIndex - 1;
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for (MachineBasicBlock::iterator I = End, E = Begin;
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for (MachineBasicBlock::iterator I = End, E = Begin; I != E; --Count) {
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I != E; --Count) {
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MachineInstr *MI = --I;
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MachineInstr *MI = --I;
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if (MI->isDebugValue())
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if (MI->isDebugValue())
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continue;
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continue;
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@ -526,7 +525,7 @@ BreakAntiDependencies(const std::vector<SUnit>& SUnits,
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// Don't break anti-dependencies on non-allocatable registers.
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// Don't break anti-dependencies on non-allocatable registers.
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AntiDepReg = 0;
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AntiDepReg = 0;
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else if (KeepRegs.test(AntiDepReg))
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else if (KeepRegs.test(AntiDepReg))
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// Don't break anti-dependencies if an use down below requires
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// Don't break anti-dependencies if a use down below requires
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// this exact register.
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// this exact register.
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AntiDepReg = 0;
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AntiDepReg = 0;
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else {
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else {
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@ -564,8 +563,7 @@ BreakAntiDependencies(const std::vector<SUnit>& SUnits,
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// If MI's defs have a special allocation requirement, don't allow
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// If MI's defs have a special allocation requirement, don't allow
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// any def registers to be changed. Also assume all registers
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// any def registers to be changed. Also assume all registers
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// defined in a call must not be changed (ABI).
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// defined in a call must not be changed (ABI).
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if (MI->isCall() || MI->hasExtraDefRegAllocReq() ||
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if (MI->isCall() || MI->hasExtraDefRegAllocReq() || TII->isPredicated(MI))
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TII->isPredicated(MI))
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// If this instruction's defs have special allocation requirement, don't
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// If this instruction's defs have special allocation requirement, don't
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// break this anti-dependency.
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// break this anti-dependency.
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AntiDepReg = 0;
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AntiDepReg = 0;
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@ -55,12 +55,12 @@ class TargetRegisterInfo;
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typedef std::multimap<unsigned, MachineOperand *>::const_iterator
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typedef std::multimap<unsigned, MachineOperand *>::const_iterator
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RegRefIter;
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RegRefIter;
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/// KillIndices - The index of the most recent kill (proceding bottom-up),
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/// KillIndices - The index of the most recent kill (proceeding bottom-up),
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/// or ~0u if the register is not live.
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/// or ~0u if the register is not live.
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std::vector<unsigned> KillIndices;
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std::vector<unsigned> KillIndices;
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/// DefIndices - The index of the most recent complete def (proceding bottom
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/// DefIndices - The index of the most recent complete def (proceeding
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/// up), or ~0u if the register is live.
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/// bottom up), or ~0u if the register is live.
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std::vector<unsigned> DefIndices;
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std::vector<unsigned> DefIndices;
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/// KeepRegs - A set of registers which are live and cannot be changed to
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/// KeepRegs - A set of registers which are live and cannot be changed to
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