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AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal
llvm-svn: 327267
This commit is contained in:
Matt Arsenault
parent
1e2851aabe
commit
def6781bbe
@ -119,5 +119,32 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST,
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(Ty1.getSizeInBits() % 32 == 0);
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});
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// Merge/Unmerge
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for (unsigned Op : {G_MERGE_VALUES, G_UNMERGE_VALUES}) {
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unsigned BigTyIdx = Op == G_MERGE_VALUES ? 0 : 1;
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unsigned LitTyIdx = Op == G_MERGE_VALUES ? 1 : 0;
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getActionDefinitionsBuilder(Op)
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.legalIf([=](const LegalityQuery &Query) {
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const LLT &BigTy = Query.Types[BigTyIdx];
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const LLT &LitTy = Query.Types[LitTyIdx];
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return BigTy.getSizeInBits() % 32 == 0 &&
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LitTy.getSizeInBits() % 32 == 0 &&
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BigTy.getSizeInBits() <= 512;
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})
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// Any vectors left are the wrong size. Scalarize them.
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.fewerElementsIf([](const LegalityQuery &Query) { return true; },
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[](const LegalityQuery &Query) {
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return std::make_pair(
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0, Query.Types[0].getElementType());
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})
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.fewerElementsIf([](const LegalityQuery &Query) { return true; },
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[](const LegalityQuery &Query) {
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return std::make_pair(
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1, Query.Types[1].getElementType());
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});
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}
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computeTables();
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}
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114
test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
Normal file
114
test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
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@ -0,0 +1,114 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -global-isel %s | FileCheck %s
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---
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name: test_merge_s32_s32_s64
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body: |
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bb.0:
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; CHECK-LABEL: name: test_merge_s32_s32_s64
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(s64) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
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$vgpr0_vgpr1 = COPY %2(s64)
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...
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---
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name: test_merge_s32_s32_v2s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_merge_s32_s32_v2s32
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[MV:%[0-9]+]]:_(<2 x s32>) = G_MERGE_VALUES [[C]](s32), [[C1]](s32)
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; CHECK: $vgpr0_vgpr1 = COPY [[MV]](<2 x s32>)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(<2 x s32>) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
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$vgpr0_vgpr1 = COPY %2(<2 x s32>)
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...
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---
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name: test_merge_s32_s32_s32_v3s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_merge_s32_s32_s32_v3s32
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
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; CHECK: [[MV:%[0-9]+]]:_(<3 x s32>) = G_MERGE_VALUES [[C]](s32), [[C1]](s32), [[C2]](s32)
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; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](<3 x s32>)
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%0:_(s32) = G_CONSTANT i32 0
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%1:_(s32) = G_CONSTANT i32 1
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%2:_(s32) = G_CONSTANT i32 2
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%3:_(<3 x s32>) = G_MERGE_VALUES %0:_(s32), %1:_(s32), %2:_(s32)
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$vgpr0_vgpr1_vgpr2 = COPY %3(<3 x s32>)
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...
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---
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name: test_merge_s64_s64_s128
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body: |
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bb.0:
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; CHECK-LABEL: name: test_merge_s64_s64_s128
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[MV:%[0-9]+]]:_(<2 x s64>) = G_MERGE_VALUES [[C]](s64), [[C1]](s64)
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[MV]](<2 x s64>)
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%0:_(s64) = G_CONSTANT i64 0
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%1:_(s64) = G_CONSTANT i64 1
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%2:_(<2 x s64>) = G_MERGE_VALUES %0(s64), %1(s64)
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$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2(<2 x s64>)
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...
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---
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name: test_merge_s64_s64_s64_s64_v4s64
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body: |
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bb.0:
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; CHECK-LABEL: name: test_merge_s64_s64_s64_s64_v4s64
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
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; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
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; CHECK: [[MV:%[0-9]+]]:_(<4 x s64>) = G_MERGE_VALUES [[C]](s64), [[C1]](s64), [[C2]](s64), [[C3]](s64)
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; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[MV]](<4 x s64>)
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%0:_(s64) = G_CONSTANT i64 0
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%1:_(s64) = G_CONSTANT i64 1
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%2:_(s64) = G_CONSTANT i64 2
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%3:_(s64) = G_CONSTANT i64 3
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%4:_(<4 x s64>) = G_MERGE_VALUES %0(s64), %1(s64), %2(s64), %3(s64)
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$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %4(<4 x s64>)
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...
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# FIXME: Should be split up
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# ---
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# name: test_merge_17_x_i32
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# body: |
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# bb.0:
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# %0:_(s32) = G_CONSTANT i32 0
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# %1:_(s32) = G_CONSTANT i32 1
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# %2:_(s32) = G_CONSTANT i32 2
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# %3:_(s32) = G_CONSTANT i32 3
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# %4:_(s32) = G_CONSTANT i32 4
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# %5:_(s32) = G_CONSTANT i32 5
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# %6:_(s32) = G_CONSTANT i32 6
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# %7:_(s32) = G_CONSTANT i32 7
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# %8:_(s32) = G_CONSTANT i32 8
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# %9:_(s32) = G_CONSTANT i32 9
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# %10:_(s32) = G_CONSTANT i32 10
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# %11:_(s32) = G_CONSTANT i32 11
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# %12:_(s32) = G_CONSTANT i32 12
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# %13:_(s32) = G_CONSTANT i32 13
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# %14:_(s32) = G_CONSTANT i32 14
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# %15:_(s32) = G_CONSTANT i32 15
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# %16:_(s32) = G_CONSTANT i32 16
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# %17:_(<17 x s32>) = G_MERGE_VALUES %0:_(s32), %1:_(s32), %2:_(s32), %3:_(s32), %4:_(s32), %5:_(s32), %6:_(s32), %7:_(s32), %8:_(s32), %9:_(s32), %10:_(s32), %11:_(s32), %12:_(s32), %13:_(s32), %14:_(s32), %15:_(s32), %16:_(s32)
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# S_ENDPGM implicit %17(<17 x s32>)
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# ...
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33
test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
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33
test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
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@ -0,0 +1,33 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-- -O0 -run-pass=legalizer -global-isel -o - %s | FileCheck %s
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---
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name: test_unmerge_s64_s32
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body: |
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bb.0:
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; CHECK-LABEL: name: test_unmerge_s64_s32
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; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
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; CHECK: $vgpr0 = COPY [[UV]](s32)
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; CHECK: $vgpr2 = COPY [[UV1]](s32)
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%0:_(s64) = G_CONSTANT i64 0
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%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0:_(s64)
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$vgpr0 = COPY %1(s32)
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$vgpr2 = COPY %2(s32)
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...
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---
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name: test_unmerge_v2s32_s32
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1
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; CHECK-LABEL: name: test_unmerge_v2s32_s32
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
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; CHECK: $vgpr0 = COPY [[UV]](s32)
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; CHECK: $vgpr2 = COPY [[UV1]](s32)
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%0:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%1:_(s32), %2:_(s32) = G_UNMERGE_VALUES %0:_(<2 x s32>)
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$vgpr0 = COPY %1(s32)
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$vgpr2 = COPY %2(s32)
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...
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