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[AArch64] Support llvm-mc/llvm-objdump -M no-aliases

This enables the no-aliases forms of many instructions.

Depends on D103004

Reviewed By: tmatheson

Differential Revision: https://reviews.llvm.org/D103005
This commit is contained in:
Fangrui Song 2021-05-26 13:35:31 -07:00
parent b75ea85ad5
commit df086a1bfa
3 changed files with 29 additions and 10 deletions

View File

@ -51,6 +51,14 @@ AArch64AppleInstPrinter::AArch64AppleInstPrinter(const MCAsmInfo &MAI,
const MCRegisterInfo &MRI)
: AArch64InstPrinter(MAI, MII, MRI) {}
bool AArch64InstPrinter::applyTargetSpecificCLOption(StringRef Opt) {
if (Opt == "no-aliases") {
PrintAliases = false;
return true;
}
return false;
}
void AArch64InstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
// This is for .cfi directives.
OS << getRegisterName(RegNo);
@ -296,7 +304,7 @@ void AArch64InstPrinter::printInst(const MCInst *MI, uint64_t Address,
return;
}
if (!printAliasInstr(MI, Address, STI, O))
if (!PrintAliases || !printAliasInstr(MI, Address, STI, O))
printInstruction(MI, Address, STI, O);
printAnnotation(O, Annot);

View File

@ -25,6 +25,8 @@ public:
AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
const MCRegisterInfo &MRI);
bool applyTargetSpecificCLOption(StringRef Opt) override;
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
const MCSubtargetInfo &STI, raw_ostream &O) override;
void printRegName(raw_ostream &OS, unsigned RegNo) const override;

View File

@ -1,4 +1,5 @@
// RUN: llvm-mc -triple=aarch64-none-linux-gnu < %s | FileCheck %s
// RUN: llvm-mc -triple=aarch64 < %s | FileCheck %s --check-prefixes=CHECK,ALIAS
// RUN: llvm-mc -triple=aarch64 -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,NOALIAS
// RUN: not llvm-mc -mattr=+no-neg-immediates -triple=aarch64-none-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-NEG-IMM
add w0, w2, #4096
@ -103,23 +104,31 @@
// CHECK: adds x2, x5, #0
adds x2, x5, #0
// CHECK: {{adds xzr,|cmn}} x5, #5
// CHECK: {{adds xzr,|cmn}} x5, #5
// ALIAS: cmn x5, #5
// ALIAS: cmn x5, #5
// NOALIAS: adds xzr, x5, #5
// NOALIAS: adds xzr, x5, #5
// CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
cmn x5, #5
cmp x5, #-5
// CHECK: {{subs xzr,|cmp}} x6, #4095
// CHECK: {{subs xzr,|cmp}} x6, #4095
// ALIAS: cmp x6, #4095
// ALIAS: cmp x6, #4095
// NOALIAS: subs xzr, x6, #4095
// NOALIAS: subs xzr, x6, #4095
// CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
cmp x6, #4095
cmn x6, #-4095
// CHECK: {{adds wzr,|cmn}} w7, #5
// CHECK: {{adds wzr,|cmn}} w7, #5
// ALIAS: cmn w7, #5
// ALIAS: cmn w7, #5
// NOALIAS: adds wzr, w7, #5
// NOALIAS: adds wzr, w7, #5
// CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
cmn w7, #5
cmp w7, #-5
// CHECK: {{subs wzr,|cmp}} w8, #4095
// CHECK: {{subs wzr,|cmp}} w8, #4095
// ALIAS: cmp w8, #4095
// ALIAS: cmp w8, #4095
// NOALIAS: subs wzr, w8, #4095
// NOALIAS: subs wzr, w8, #4095
// CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
cmp w8, #4095
cmn w8, #-4095