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https://github.com/RPCS3/llvm-mirror.git
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[AMDGPU] pre-commit collapse-endcf.mir. NFC.
Pre commit test before D76033.
This commit is contained in:
Stanislav Mekhanoshin
parent
5b57ac22c4
commit
df37759ded
@ -1,5 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-optimize-exec-masking-pre-ra -amdgpu-remove-redundant-endcf %s -o - | FileCheck -check-prefix=GCN %s
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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=si-lower-control-flow %s -o - | FileCheck -check-prefix=GCN %s
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# Make sure dbg_value doesn't change codeegn when collapsing end_cf
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---
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@ -20,37 +20,37 @@ body: |
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; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
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; GCN: SI_MASK_BRANCH %bb.4, implicit $exec
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; GCN: S_BRANCH %bb.1
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
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; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
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; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
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; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
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; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
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; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
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; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
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; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
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; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
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; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
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; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
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; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
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; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
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; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
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; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
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; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
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; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
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; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
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; GCN: bb.2:
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; GCN: successors: %bb.3(0x80000000)
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; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
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; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
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; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
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; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
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; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: bb.3:
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; GCN: successors: %bb.4(0x80000000)
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; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
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; GCN: DBG_VALUE
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; GCN: bb.4:
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; GCN: DBG_VALUE
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; GCN: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
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; GCN: DBG_VALUE
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; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
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; GCN: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; GCN: $m0 = S_MOV_B32 -1
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@ -63,11 +63,7 @@ body: |
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%1:sgpr_64 = COPY $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
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%3:sreg_64 = COPY $exec, implicit-def $exec
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%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
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$exec = S_MOV_B64_term %4
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SI_MASK_BRANCH %bb.4, implicit $exec
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S_BRANCH %bb.1
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%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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bb.1:
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successors: %bb.2, %bb.3
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@ -82,11 +78,7 @@ body: |
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%5.sub2:sgpr_128 = S_MOV_B32 0
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BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
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%12:sreg_64 = COPY $exec, implicit-def $exec
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%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
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$exec = S_MOV_B64_term %13
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SI_MASK_BRANCH %bb.3, implicit $exec
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S_BRANCH %bb.2
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%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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bb.2:
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%5.sub0:sgpr_128 = COPY %5.sub2
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@ -95,12 +87,12 @@ body: |
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BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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bb.3:
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$exec = S_OR_B64 $exec, %12, implicit-def $scc
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SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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DBG_VALUE
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bb.4:
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DBG_VALUE
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$exec = S_OR_B64 $exec, %3, implicit-def $scc
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SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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%15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
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%16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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$m0 = S_MOV_B32 -1
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@ -128,33 +120,33 @@ body: |
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; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
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; GCN: SI_MASK_BRANCH %bb.5, implicit $exec
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; GCN: S_BRANCH %bb.1
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: S_CBRANCH_EXECZ %bb.5, implicit $exec
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
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; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
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; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
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; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
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; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
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; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
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; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
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; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
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; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
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; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
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; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
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; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
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; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
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; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
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; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
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; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
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; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
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; GCN: S_BRANCH %bb.2
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; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
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; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
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; GCN: bb.2:
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; GCN: successors: %bb.3(0x80000000)
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; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
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; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
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; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
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; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
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; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: bb.3:
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; GCN: successors: %bb.4(0x80000000)
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; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
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; GCN: bb.4:
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; GCN: successors: %bb.5(0x80000000)
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; GCN: bb.5:
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@ -171,11 +163,7 @@ body: |
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%1:sgpr_64 = COPY $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
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%3:sreg_64 = COPY $exec, implicit-def $exec
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%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
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$exec = S_MOV_B64_term %4
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SI_MASK_BRANCH %bb.4, implicit $exec
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S_BRANCH %bb.1
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%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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bb.1:
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successors: %bb.2, %bb.3
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@ -190,11 +178,7 @@ body: |
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%5.sub2:sgpr_128 = S_MOV_B32 0
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BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
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%12:sreg_64 = COPY $exec, implicit-def $exec
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%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
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$exec = S_MOV_B64_term %13
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SI_MASK_BRANCH %bb.3, implicit $exec
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S_BRANCH %bb.2
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%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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bb.2:
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%5.sub0:sgpr_128 = COPY %5.sub2
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@ -203,12 +187,12 @@ body: |
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BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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bb.3:
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$exec = S_OR_B64 $exec, %12, implicit-def $scc
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SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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bb.5:
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bb.4:
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$exec = S_OR_B64 $exec, %3, implicit-def $scc
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SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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%15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
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%16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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$m0 = S_MOV_B32 -1
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@ -236,33 +220,33 @@ body: |
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; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
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; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
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; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
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; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
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; GCN: SI_MASK_BRANCH %bb.5, implicit $exec
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; GCN: S_BRANCH %bb.1
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; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
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; GCN: S_CBRANCH_EXECZ %bb.5, implicit $exec
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; GCN: bb.1:
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; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
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; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
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; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
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; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
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; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
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; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
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; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
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; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
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; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
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; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
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; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
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; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
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; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
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; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
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; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
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; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
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; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
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; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
|
||||
; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
; GCN: S_BRANCH %bb.2
|
||||
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
|
||||
; GCN: bb.2:
|
||||
; GCN: successors: %bb.3(0x80000000)
|
||||
; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
|
||||
; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
|
||||
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: bb.3:
|
||||
; GCN: successors: %bb.4(0x80000000)
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
|
||||
; GCN: bb.4:
|
||||
; GCN: successors: %bb.5(0x80000000)
|
||||
; GCN: DBG_VALUE
|
||||
@ -280,11 +264,7 @@ body: |
|
||||
%1:sgpr_64 = COPY $sgpr0_sgpr1
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
%3:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %4
|
||||
SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.3
|
||||
@ -299,11 +279,7 @@ body: |
|
||||
%5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
|
||||
%12:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %13
|
||||
SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.2:
|
||||
%5.sub0:sgpr_128 = COPY %5.sub2
|
||||
@ -312,13 +288,13 @@ body: |
|
||||
BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
|
||||
bb.3:
|
||||
$exec = S_OR_B64 $exec, %12, implicit-def $scc
|
||||
SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.5:
|
||||
DBG_VALUE
|
||||
|
||||
bb.4:
|
||||
$exec = S_OR_B64 $exec, %3, implicit-def $scc
|
||||
SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
%16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
$m0 = S_MOV_B32 -1
|
||||
@ -345,38 +321,36 @@ body: |
|
||||
; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
|
||||
; GCN: SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
; GCN: S_BRANCH %bb.1
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
|
||||
; GCN: bb.1:
|
||||
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
|
||||
; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
|
||||
; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
|
||||
; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
|
||||
; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
|
||||
; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
|
||||
; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
|
||||
; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
; GCN: S_BRANCH %bb.2
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
|
||||
; GCN: bb.2:
|
||||
; GCN: successors: %bb.3(0x80000000)
|
||||
; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
|
||||
; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
|
||||
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: bb.3:
|
||||
; GCN: successors: %bb.4(0x80000000)
|
||||
; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
|
||||
; GCN: dead %16:sgpr_32 = S_BREV_B32 [[DEF]]
|
||||
; GCN: KILL [[DEF]]
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
|
||||
; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
|
||||
; GCN: [[S_BREV_B32_:%[0-9]+]]:sgpr_32 = S_BREV_B32 [[DEF]]
|
||||
; GCN: KILL [[DEF]]
|
||||
; GCN: bb.4:
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
|
||||
; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
@ -391,11 +365,7 @@ body: |
|
||||
%1:sgpr_64 = COPY $sgpr0_sgpr1
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
%3:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %4
|
||||
SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.3
|
||||
@ -410,11 +380,7 @@ body: |
|
||||
%5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
|
||||
%12:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %13
|
||||
SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.2:
|
||||
%5.sub0:sgpr_128 = COPY %5.sub2
|
||||
@ -426,10 +392,10 @@ body: |
|
||||
%15:sgpr_32 = IMPLICIT_DEF
|
||||
%16:sgpr_32 = S_BREV_B32 %15
|
||||
KILL %15
|
||||
$exec = S_OR_B64 $exec, %12, implicit-def $scc
|
||||
SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.4:
|
||||
$exec = S_OR_B64 $exec, %3, implicit-def $scc
|
||||
SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
%18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
$m0 = S_MOV_B32 -1
|
||||
@ -458,37 +424,37 @@ body: |
|
||||
; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
|
||||
; GCN: SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
; GCN: S_BRANCH %bb.1
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
|
||||
; GCN: bb.1:
|
||||
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
|
||||
; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
|
||||
; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
|
||||
; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
|
||||
; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
|
||||
; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
|
||||
; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
|
||||
; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
; GCN: S_BRANCH %bb.2
|
||||
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
|
||||
; GCN: bb.2:
|
||||
; GCN: successors: %bb.3(0x80000000)
|
||||
; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
|
||||
; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
|
||||
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: bb.3:
|
||||
; GCN: successors: %bb.4(0x80000000)
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
|
||||
; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
|
||||
; GCN: [[S_BREV_B32_:%[0-9]+]]:sgpr_32 = S_BREV_B32 [[DEF]]
|
||||
; GCN: KILL [[DEF]]
|
||||
; GCN: dead %17:sgpr_32 = COPY [[S_BREV_B32_]]
|
||||
; GCN: [[COPY5:%[0-9]+]]:sgpr_32 = COPY [[S_BREV_B32_]]
|
||||
; GCN: bb.4:
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
|
||||
; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
@ -503,11 +469,7 @@ body: |
|
||||
%1:sgpr_64 = COPY $sgpr0_sgpr1
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
%3:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %4
|
||||
SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.3
|
||||
@ -522,11 +484,7 @@ body: |
|
||||
%5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
|
||||
%12:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %13
|
||||
SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.2:
|
||||
%5.sub0:sgpr_128 = COPY %5.sub2
|
||||
@ -535,14 +493,14 @@ body: |
|
||||
BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
|
||||
bb.3:
|
||||
$exec = S_OR_B64 $exec, %12, implicit-def $scc
|
||||
SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%15:sgpr_32 = IMPLICIT_DEF
|
||||
%16:sgpr_32 = S_BREV_B32 %15
|
||||
KILL %15
|
||||
%19:sgpr_32 = COPY %16
|
||||
|
||||
bb.4:
|
||||
$exec = S_OR_B64 $exec, %3, implicit-def $scc
|
||||
SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
%18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
$m0 = S_MOV_B32 -1
|
||||
@ -570,36 +528,34 @@ body: |
|
||||
; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
|
||||
; GCN: SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
; GCN: S_BRANCH %bb.1
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
|
||||
; GCN: bb.1:
|
||||
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
|
||||
; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
|
||||
; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
|
||||
; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
|
||||
; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
|
||||
; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
|
||||
; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
|
||||
; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
; GCN: S_BRANCH %bb.2
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
|
||||
; GCN: bb.2:
|
||||
; GCN: successors: %bb.3(0x80000000)
|
||||
; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
|
||||
; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
|
||||
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: bb.3:
|
||||
; GCN: successors: %bb.4(0x80000000)
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
|
||||
; GCN: dead %15:sreg_64 = S_BREV_B64 $exec
|
||||
; GCN: [[S_BREV_B64_:%[0-9]+]]:sreg_64 = S_BREV_B64 $exec
|
||||
; GCN: bb.4:
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
|
||||
; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
@ -614,11 +570,7 @@ body: |
|
||||
%1:sgpr_64 = COPY $sgpr0_sgpr1
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
%3:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %4
|
||||
SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.3
|
||||
@ -633,11 +585,7 @@ body: |
|
||||
%5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
|
||||
%12:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %13
|
||||
SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.2:
|
||||
%5.sub0:sgpr_128 = COPY %5.sub2
|
||||
@ -646,11 +594,11 @@ body: |
|
||||
BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
|
||||
bb.3:
|
||||
$exec = S_OR_B64 $exec, %12, implicit-def $scc
|
||||
SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%15:sreg_64 = S_BREV_B64 $exec
|
||||
|
||||
bb.4:
|
||||
$exec = S_OR_B64 $exec, %3, implicit-def $scc
|
||||
SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
%18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
$m0 = S_MOV_B32 -1
|
||||
@ -678,36 +626,34 @@ body: |
|
||||
; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
|
||||
; GCN: SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
; GCN: S_BRANCH %bb.1
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
|
||||
; GCN: bb.1:
|
||||
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
|
||||
; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
|
||||
; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
|
||||
; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
|
||||
; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
|
||||
; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
|
||||
; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
|
||||
; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
; GCN: S_BRANCH %bb.2
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
|
||||
; GCN: bb.2:
|
||||
; GCN: successors: %bb.3(0x80000000)
|
||||
; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
|
||||
; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
|
||||
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: bb.3:
|
||||
; GCN: successors: %bb.4(0x80000000)
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
|
||||
; GCN: dead %15:vgpr_32 = COPY %5.sub2
|
||||
; GCN: [[COPY5:%[0-9]+]]:vgpr_32 = COPY %4.sub2
|
||||
; GCN: bb.4:
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc
|
||||
; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
@ -722,11 +668,7 @@ body: |
|
||||
%1:sgpr_64 = COPY $sgpr0_sgpr1
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
%3:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %4
|
||||
SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.3
|
||||
@ -741,11 +683,7 @@ body: |
|
||||
%5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
|
||||
%12:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %13
|
||||
SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.2:
|
||||
%5.sub0:sgpr_128 = COPY %5.sub2
|
||||
@ -754,11 +692,11 @@ body: |
|
||||
BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
|
||||
bb.3:
|
||||
$exec = S_OR_B64 $exec, %12, implicit-def $scc
|
||||
SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%15:vgpr_32 = COPY %5.sub2
|
||||
|
||||
bb.4:
|
||||
$exec = S_OR_B64 $exec, %3, implicit-def $scc
|
||||
SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%17:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
%18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
$m0 = S_MOV_B32 -1
|
||||
@ -767,7 +705,6 @@ body: |
|
||||
|
||||
...
|
||||
|
||||
# There's no real reason this can't be handled, but isn't now.
|
||||
---
|
||||
name: simple_nested_if_not_layout_successor
|
||||
tracksRegLiveness: true
|
||||
@ -786,32 +723,30 @@ body: |
|
||||
; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_LT_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_]]
|
||||
; GCN: SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
; GCN: S_BRANCH %bb.1
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
|
||||
; GCN: bb.1:
|
||||
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GCN: undef %5.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %6.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %6.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %5.sub1
|
||||
; GCN: undef %8.sub0:vreg_64, %9:sreg_64_xexec = V_ADD_I32_e64 %5.sub0, %6.sub0, 0, implicit $exec
|
||||
; GCN: %8.sub1:vreg_64, dead %10:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %9, 0, implicit $exec
|
||||
; GCN: %5.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM [[COPY]], 9, 0, 0 :: (dereferenceable invariant load 8, align 4, addrspace 4)
|
||||
; GCN: undef %5.sub0:vreg_64 = V_LSHLREV_B32_e32 2, [[COPY1]], implicit $exec
|
||||
; GCN: %5.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec
|
||||
; GCN: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %4.sub1
|
||||
; GCN: undef %7.sub0:vreg_64, %8:sreg_64_xexec = V_ADD_I32_e64 %4.sub0, %5.sub0, 0, implicit $exec
|
||||
; GCN: %7.sub1:vreg_64, dead %9:sreg_64_xexec = V_ADDC_U32_e64 0, [[COPY3]], %8, 0, implicit $exec
|
||||
; GCN: %4.sub3:sgpr_128 = S_MOV_B32 61440
|
||||
; GCN: %4.sub2:sgpr_128 = S_MOV_B32 0
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 %5.sub1, %5, %4, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 2, [[COPY1]], implicit $exec
|
||||
; GCN: [[COPY4:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec
|
||||
; GCN: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY4]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc
|
||||
; GCN: $exec = S_MOV_B64_term [[S_AND_B64_1]]
|
||||
; GCN: SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
; GCN: S_BRANCH %bb.2
|
||||
; GCN: $exec = S_MOV_B64_term killed [[S_AND_B64_1]]
|
||||
; GCN: S_CBRANCH_EXECZ %bb.3, implicit $exec
|
||||
; GCN: bb.2:
|
||||
; GCN: successors: %bb.3(0x80000000)
|
||||
; GCN: %5.sub0:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %5.sub1:sgpr_128 = COPY %5.sub2
|
||||
; GCN: %4.sub0:sgpr_128 = COPY %4.sub2
|
||||
; GCN: %4.sub1:sgpr_128 = COPY %4.sub2
|
||||
; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: BUFFER_STORE_DWORD_ADDR64 [[V_MOV_B32_e32_]], %7, %4, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
; GCN: bb.3:
|
||||
; GCN: successors: %bb.5(0x80000000)
|
||||
; GCN: $exec = S_OR_B64 $exec, [[COPY4]], implicit-def $scc
|
||||
@ -833,11 +768,7 @@ body: |
|
||||
%1:sgpr_64 = COPY $sgpr0_sgpr1
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
%3:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %4
|
||||
SI_MASK_BRANCH %bb.4, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
%3:sreg_64 = SI_IF %2:sreg_64, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.2, %bb.3
|
||||
@ -852,11 +783,7 @@ body: |
|
||||
%5.sub2:sgpr_128 = S_MOV_B32 0
|
||||
BUFFER_STORE_DWORD_ADDR64 %6.sub1, %6, %5, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
%11:sreg_64 = V_CMP_NE_U32_e64 2, %0, implicit $exec
|
||||
%12:sreg_64 = COPY $exec, implicit-def $exec
|
||||
%13:sreg_64 = S_AND_B64 %12, %11, implicit-def dead $scc
|
||||
$exec = S_MOV_B64_term %13
|
||||
SI_MASK_BRANCH %bb.3, implicit $exec
|
||||
S_BRANCH %bb.2
|
||||
%12:sreg_64 = SI_IF %11:sreg_64, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
bb.2:
|
||||
%5.sub0:sgpr_128 = COPY %5.sub2
|
||||
@ -865,11 +792,11 @@ body: |
|
||||
BUFFER_STORE_DWORD_ADDR64 %14, %8, %5, 0, 4, 0, 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
|
||||
|
||||
bb.3:
|
||||
$exec = S_OR_B64 $exec, %12, implicit-def $scc
|
||||
SI_END_CF %12:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
S_BRANCH %bb.5
|
||||
|
||||
bb.4:
|
||||
$exec = S_OR_B64 $exec, %3, implicit-def $scc
|
||||
SI_END_CF %3:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
%15:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
|
||||
%16:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
$m0 = S_MOV_B32 -1
|
||||
@ -880,3 +807,36 @@ body: |
|
||||
S_BRANCH %bb.4
|
||||
|
||||
...
|
||||
|
||||
# This should never happen, but check that we do not hang anyway
|
||||
|
||||
---
|
||||
name: resursive_endcf
|
||||
tracksRegLiveness: true
|
||||
liveins:
|
||||
- { reg: '$vgpr0', virtual-reg: '%0' }
|
||||
machineFunctionInfo:
|
||||
isEntryFunction: true
|
||||
body: |
|
||||
; GCN-LABEL: name: resursive_endcf
|
||||
; GCN: bb.0:
|
||||
; GCN: successors: %bb.1(0x80000000)
|
||||
; GCN: liveins: $vgpr0
|
||||
; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GCN: [[V_CMP_LT_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_U32_e64 1, [[COPY]], implicit $exec
|
||||
; GCN: bb.1:
|
||||
; GCN: successors: %bb.1(0x80000000)
|
||||
; GCN: $exec = S_OR_B64 $exec, [[V_CMP_LT_U32_e64_]], implicit-def $scc
|
||||
; GCN: S_BRANCH %bb.1
|
||||
bb.0:
|
||||
successors: %bb.1
|
||||
liveins: $vgpr0
|
||||
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%2:sreg_64 = V_CMP_LT_U32_e64 1, %0, implicit $exec
|
||||
|
||||
bb.1:
|
||||
successors: %bb.1
|
||||
|
||||
SI_END_CF %2:sreg_64, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
S_BRANCH %bb.1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user