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ARM assembly parsing and encoding for UMULL.

Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136277
This commit is contained in:
Jim Grosbach 2011-07-27 22:01:42 +00:00
parent a31c9d991e
commit df8040c528
2 changed files with 15 additions and 1 deletions

View File

@ -2360,7 +2360,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
// predicated but do have a carry-set and so weren't caught above.
if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" &&
Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls" &&
Mnemonic != "umlals") {
Mnemonic != "umlals" && Mnemonic != "umulls") {
unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2))
.Case("eq", ARMCC::EQ)
.Case("ne", ARMCC::NE)

View File

@ -2081,3 +2081,17 @@ _func:
@ CHECK: umlalgt r6, r1, r2, r6 @ encoding: [0x92,0x66,0xa1,0xc0]
@ CHECK: umlals r2, r9, r2, r3 @ encoding: [0x92,0x23,0xb9,0xe0]
@ CHECK: umlalseq r3, r5, r1, r2 @ encoding: [0x91,0x32,0xb5,0x00]
@------------------------------------------------------------------------------
@ UMULL
@------------------------------------------------------------------------------
umull r2, r4, r6, r8
umullgt r6, r1, r2, r6
umulls r2, r9, r2, r3
umullseq r3, r5, r1, r2
@ CHECK: umull r2, r4, r6, r8 @ encoding: [0x96,0x28,0x84,0xe0]
@ CHECK: umullgt r6, r1, r2, r6 @ encoding: [0x92,0x66,0x81,0xc0]
@ CHECK: umulls r2, r9, r2, r3 @ encoding: [0x92,0x23,0x99,0xe0]
@ CHECK: umullseq r3, r5, r1, r2 @ encoding: [0x91,0x32,0x95,0x00]