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add a note about dead zero extends.
llvm-svn: 78511
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@ -249,3 +249,52 @@ lowered return value, and it would free non-C frontends from a
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complication only required by a C-based ABI.
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//===---------------------------------------------------------------------===//
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We get a redundant zero extension for code like this:
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int mask[1000];
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int foo(unsigned x) {
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if (x < 10)
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x = x * 45;
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else
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x = x * 78;
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return mask[x];
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}
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_foo:
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LBB1_0: ## entry
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cmpl $9, %edi
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jbe LBB1_3 ## bb
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LBB1_1: ## bb1
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imull $78, %edi, %eax
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LBB1_2: ## bb2
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movl %eax, %eax <----
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movq _mask@GOTPCREL(%rip), %rcx
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movl (%rcx,%rax,4), %eax
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ret
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LBB1_3: ## bb
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imull $45, %edi, %eax
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jmp LBB1_2 ## bb2
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Before regalloc, we have:
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%reg1025<def> = IMUL32rri8 %reg1024, 45, %EFLAGS<imp-def>
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JMP mbb<bb2,0x203afb0>
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Successors according to CFG: 0x203afb0 (#3)
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bb1: 0x203af60, LLVM BB @0x1e02310, ID#2:
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Predecessors according to CFG: 0x203aec0 (#0)
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%reg1026<def> = IMUL32rri8 %reg1024, 78, %EFLAGS<imp-def>
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Successors according to CFG: 0x203afb0 (#3)
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bb2: 0x203afb0, LLVM BB @0x1e02340, ID#3:
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Predecessors according to CFG: 0x203af10 (#1) 0x203af60 (#2)
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%reg1027<def> = PHI %reg1025, mbb<bb,0x203af10>,
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%reg1026, mbb<bb1,0x203af60>
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%reg1029<def> = MOVZX64rr32 %reg1027
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so we'd have to know that IMUL32rri8 leaves the high word zero extended and to
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be able to recognize the zero extend. This could also presumably be implemented
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if we have whole-function selectiondags.
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//===---------------------------------------------------------------------===//
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