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[InstCombine] collectBitParts - add bitreverse intrinsic support.
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@ -2947,6 +2947,20 @@ collectBitParts(Value *V, bool MatchBSwaps, bool MatchBitReversals,
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return Result;
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}
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// BITREVERSE - most likely due to us previous matching a partial
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// bitreverse.
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if (match(V, m_BitReverse(m_Value(X)))) {
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const auto &Res =
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collectBitParts(X, MatchBSwaps, MatchBitReversals, BPS, Depth + 1);
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if (!Res)
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return Result;
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Result = BitPart(Res->Provider, BitWidth);
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for (unsigned BitIdx = 0; BitIdx < BitWidth; ++BitIdx)
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Result->Provenance[(BitWidth - 1) - BitIdx] = Res->Provenance[BitIdx];
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return Result;
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}
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// BSWAP - most likely due to us previous matching a partial bswap.
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if (match(V, m_BSwap(m_Value(X)))) {
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const auto &Res =
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@ -537,12 +537,7 @@ declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>)
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define i16 @partial_bitreverse(i16 %x) {
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; CHECK-LABEL: @partial_bitreverse(
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; CHECK-NEXT: [[REV:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[X:%.*]])
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; CHECK-NEXT: [[LO:%.*]] = and i16 [[REV]], 255
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; CHECK-NEXT: [[HI:%.*]] = and i16 [[REV]], -256
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; CHECK-NEXT: [[REVLO:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[LO]])
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; CHECK-NEXT: [[REVHI:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[HI]])
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; CHECK-NEXT: [[OR:%.*]] = call i16 @llvm.fshl.i16(i16 [[REVHI]], i16 [[REVLO]], i16 8)
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; CHECK-NEXT: [[OR:%.*]] = call i16 @llvm.bswap.i16(i16 [[X:%.*]])
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; CHECK-NEXT: ret i16 [[OR]]
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;
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%rev= call i16 @llvm.bitreverse.i16(i16 %x)
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