RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
Code Issues Projects Releases Wiki Activity

[AArch64] Regenerate dag-numsignbits.ll checks

Browse Source 
To improve the codegen diff in D87502
This commit is contained in:
Simon Pilgrim 2020-09-24 18:03:59 +01:00
parent 2cf078023e
commit dfd2bb96aa
1 changed files with 20 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
test/CodeGen/AArch64/dag-numsignbits.ll
View File

@ -1,18 +1,28 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64-unknown | FileCheck %s
; PR32273
define void @signbits_vXi1(<4 x i16> %a1) {
; CHECK-LABEL: signbits_vXi1
; CHECK: cmgt v0.4h, v1.4h, v0.4h
; CHECK-NEXT: and v0.8b, v0.8b, v2.8b
; CHECK-NEXT: shl v0.4h, v0.4h, #15
; CHECK-NEXT: sshr v0.4h, v0.4h, #15
; CHECK-NEXT: umov w0, v0.h[0]
; CHECK-NEXT: umov w3, v0.h[3]
; CHECK-NEXT: mov w1, wzr
; CHECK-NEXT: mov w2, wzr
; CHECK-NEXT: b foo
; CHECK-LABEL: signbits_vXi1:
; CHECK: // %bb.0:
; CHECK-NEXT: adrp x8, .LCPI0_0
; CHECK-NEXT: ldr d1, [x8, :lo12:.LCPI0_0]
; CHECK-NEXT: adrp x8, .LCPI0_1
; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
; CHECK-NEXT: ldr d2, [x8, :lo12:.LCPI0_1]
; CHECK-NEXT: dup v0.4h, v0.h[0]
; CHECK-NEXT: add v0.4h, v0.4h, v1.4h
; CHECK-NEXT: movi v1.4h, #1
; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h
; CHECK-NEXT: and v0.8b, v0.8b, v2.8b
; CHECK-NEXT: shl v0.4h, v0.4h, #15
; CHECK-NEXT: sshr v0.4h, v0.4h, #15
; CHECK-NEXT: umov w0, v0.h[0]
; CHECK-NEXT: umov w3, v0.h[3]
; CHECK-NEXT: mov w1, wzr
; CHECK-NEXT: mov w2, wzr
; CHECK-NEXT: b foo
%tmp3 = shufflevector <4 x i16> %a1, <4 x i16> undef, <4 x i32> zeroinitializer
%tmp5 = add <4 x i16> %tmp3, <i16 18249, i16 6701, i16 -18744, i16 -25086>
%tmp6 = icmp slt <4 x i16> %tmp5, <i16 1, i16 1, i16 1, i16 1>