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[GlobalISel][X86] Fix mir tests, use correct physical register.NFC.

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llvm-svn: 310996
This commit is contained in:
Igor Breger 2017-08-16 07:25:51 +00:00
parent b1da4d515d
commit e0963ec537
3 changed files with 36 additions and 21 deletions
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53
test/CodeGen/X86/GlobalISel/select-GV.mir
View File

@ -7,9 +7,10 @@
@g_int = global i32 0, align 4
define i32* @test_global_ptrv() {
define void @test_global_ptrv() {
entry:
ret i32* @g_int
store i32* @g_int, i32** undef
ret void
}
define i32 @test_global_valv() {
@ -27,31 +28,45 @@ legalized: true
regBankSelected: true
# X64ALL: registers:
# X64ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' }
# X64ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' }
#
# X32ALL: registers:
# X32ALL-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X32: registers:
# X32-NEXT: - { id: 0, class: gr32, preferred-register: '' }
# X32-NEXT: - { id: 1, class: gr32, preferred-register: '' }
#
# X32ABI: registers:
# X32ABI-NEXT: - { id: 0, class: low32_addr_access, preferred-register: '' }
# X32ABI-NEXT: - { id: 1, class: gr32, preferred-register: '' }
registers:
- { id: 0, class: gpr, preferred-register: '' }
# X64: %0 = LEA64r _, 1, _, @g_int, _
# X64-NEXT: %rax = COPY %0
# X64-NEXT: RET 0, implicit %rax
- { id: 1, class: gpr, preferred-register: '' }
# X64: %0 = IMPLICIT_DEF
# X64-NEXT: %1 = LEA64r _, 1, _, @g_int, _
# X64-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X64-NEXT: RET 0
#
# X64_DARWIN_PIC: %0 = LEA64r %rip, 1, _, @g_int, _
# X64_DARWIN_PIC-NEXT: %rax = COPY %0
# X64_DARWIN_PIC-NEXT: RET 0, implicit %rax
# X64_DARWIN_PIC: %0 = IMPLICIT_DEF
# X64_DARWIN_PIC-NEXT: %1 = LEA64r %rip, 1, _, @g_int, _
# X64_DARWIN_PIC-NEXT: MOV64mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X64_DARWIN_PIC-NEXT: RET 0
#
# X32: %0 = LEA32r _, 1, _, @g_int, _
# X32-NEXT: %rax = COPY %0
# X32-NEXT: RET 0, implicit %rax
# X32: %0 = IMPLICIT_DEF
# X32-NEXT: %1 = LEA32r _, 1, _, @g_int, _
# X32-NEXT: MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X32-NEXT: RET 0
#
# X32ABI: %0 = LEA64_32r _, 1, _, @g_int, _
# X32ABI-NEXT: %rax = COPY %0
# X32ABI-NEXT: RET 0, implicit %rax
# X32ABI: %0 = IMPLICIT_DEF
# X32ABI-NEXT: %1 = LEA64_32r _, 1, _, @g_int, _
# X32ABI-NEXT: MOV32mr %0, 1, _, 0, _, %1 :: (store 8 into `i32** undef`)
# X32ABI-NEXT: RET 0
body: |
bb.1.entry:
%0(p0) = G_GLOBAL_VALUE @g_int
%rax = COPY %0(p0)
RET 0, implicit %rax
liveins: %rdi
%0(p0) = IMPLICIT_DEF
%1(p0) = G_GLOBAL_VALUE @g_int
G_STORE %1(p0), %0(p0) :: (store 8 into `i32** undef`)
RET 0
...
---

2
test/CodeGen/X86/GlobalISel/select-add.mir
View File

@ -85,7 +85,7 @@ body: |
%0(s32) = COPY %edi
%1(s32) = COPY %esi
%2(s32) = G_ADD %0, %1
%rax = COPY %2(s32)
%eax = COPY %2(s32)
...
---

2
test/CodeGen/X86/GlobalISel/select-sub.mir
View File

@ -73,7 +73,7 @@ body: |
%0(s32) = COPY %edi
%1(s32) = COPY %esi
%2(s32) = G_SUB %0, %1
%rax = COPY %2(s32)
%eax = COPY %2(s32)
...
---