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[ARM] Add earlyclobber constraint to pre/post-indexed ARM STRH instructions.

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The post-indexed instructions were missing the constraint, causing unpredictable STRH instructions to be emitted.

The earlyclobber constraint on the pre-indexed STR instructions is not strictly necessary, as the instruction selection for pre-indexed STR instructions goes through an additional layer of pseudo instructions which have the constraint defined, however it doesn't hurt to specify the constraint directly on the pre-indexed instructions as well, since at some point someone might create instances of them programmatically and then the constraint is definitely needed.

llvm-svn: 213729
This commit is contained in:
Tilmann Scheller 2014-07-23 08:12:51 +00:00
parent 908e62868c
commit e0c6a75a6a
2 changed files with 15 additions and 3 deletions
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6
lib/Target/ARM/ARMInstrInfo.td
View File

@ -2830,7 +2830,8 @@ def STRH_preidx: ARMPseudoInst<(outs GPR:$Rn_wb),
def STRH_PRE : AI3ldstidx<0b1011, 0, 1, (outs GPR:$Rn_wb), def STRH_PRE : AI3ldstidx<0b1011, 0, 1, (outs GPR:$Rn_wb),
(ins GPR:$Rt, addrmode3_pre:$addr), IndexModePre, (ins GPR:$Rt, addrmode3_pre:$addr), IndexModePre,
StMiscFrm, IIC_iStore_bh_ru, StMiscFrm, IIC_iStore_bh_ru,
"strh", "\t$Rt, $addr!", "$addr.base = $Rn_wb", []> { "strh", "\t$Rt, $addr!",
"$addr.base = $Rn_wb,@earlyclobber $Rn_wb", []> {
bits<14> addr; bits<14> addr;
let Inst{23} = addr{8}; // U bit let Inst{23} = addr{8}; // U bit
let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm let Inst{22} = addr{13}; // 1 == imm8, 0 == Rm
@ -2843,7 +2844,8 @@ def STRH_PRE : AI3ldstidx<0b1011, 0, 1, (outs GPR:$Rn_wb),
def STRH_POST : AI3ldstidx<0b1011, 0, 0, (outs GPR:$Rn_wb), def STRH_POST : AI3ldstidx<0b1011, 0, 0, (outs GPR:$Rn_wb),
(ins GPR:$Rt, addr_offset_none:$addr, am3offset:$offset), (ins GPR:$Rt, addr_offset_none:$addr, am3offset:$offset),
IndexModePost, StMiscFrm, IIC_iStore_bh_ru, IndexModePost, StMiscFrm, IIC_iStore_bh_ru,
"strh", "\t$Rt, $addr, $offset", "$addr.base = $Rn_wb", "strh", "\t$Rt, $addr, $offset",
"$addr.base = $Rn_wb,@earlyclobber $Rn_wb",
[(set GPR:$Rn_wb, (post_truncsti16 GPR:$Rt, [(set GPR:$Rn_wb, (post_truncsti16 GPR:$Rt,
addr_offset_none:$addr, addr_offset_none:$addr,
am3offset:$offset))]> { am3offset:$offset))]> {

12
test/CodeGen/ARM/2014-07-18-earlyclobber-str-post.ll
View File

@ -4,10 +4,20 @@
; e.g. str r0, [r0], #4 ; e.g. str r0, [r0], #4
define i32* @earlyclobber-str-post(i32* %addr) nounwind { define i32* @earlyclobber-str-post(i32* %addr) nounwind {
; CHECK: earlyclobber-str-post ; CHECK-LABEL: earlyclobber-str-post
; CHECK-NOT: str r[[REG:[0-9]+]], [r[[REG]]], #4 ; CHECK-NOT: str r[[REG:[0-9]+]], [r[[REG]]], #4
%val = ptrtoint i32* %addr to i32 %val = ptrtoint i32* %addr to i32
store i32 %val, i32* %addr store i32 %val, i32* %addr
%new = getelementptr i32* %addr, i32 1 %new = getelementptr i32* %addr, i32 1
ret i32* %new ret i32* %new
} }
define i16* @earlyclobber-strh-post(i16* %addr) nounwind {
; CHECK-LABEL: earlyclobber-strh-post
; CHECK-NOT: strh r[[REG:[0-9]+]], [r[[REG]]], #2
%val = ptrtoint i16* %addr to i32
%tr = trunc i32 %val to i16
store i16 %tr, i16* %addr
%new = getelementptr i16* %addr, i32 1
ret i16* %new
}