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[SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference.

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To accommodate frame layouts that have both fixed and scalable objects
on the stack, describing a stack location or offset using a pointer + uint64_t
is not sufficient. For this reason, we've introduced the StackOffset class,
which models both the fixed- and scalable sized offsets.

The TargetFrameLowering::getFrameIndexReference is made to return a StackOffset,
so that this can be used in other interfaces, such as to eliminate frame indices
in PEI or to emit Debug locations for variables on the stack.

This patch is purely mechanical and doesn't change the behaviour of how
the result of this function is used for fixed-sized offsets. The patch adds
various checks to assert that the offset has no scalable component, as frame
offsets with a scalable component are not yet supported in various places.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D90018
This commit is contained in:
Sander de Smalen 2020-11-04 08:56:54 +00:00
parent 983601ea81
commit e0eda3654e
44 changed files with 231 additions and 168 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
include/llvm/CodeGen/TargetFrameLowering.h
View File

@ -14,6 +14,7 @@
#define LLVM_CODEGEN_TARGETFRAMELOWERING_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/TypeSize.h"
#include <vector>
namespace llvm {
@ -297,8 +298,8 @@ public:
/// getFrameIndexReference - This method should return the base register
/// and offset used to reference a frame index location. The offset is
/// returned directly, and the base register is returned via FrameReg.
virtual int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const;
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const;
/// Same as \c getFrameIndexReference, except that the stack pointer (as
/// opposed to the frame pointer) will be the preferred value for \p
@ -306,9 +307,10 @@ public:
/// use offsets from RSP. If \p IgnoreSPUpdates is true, the returned
/// offset is only guaranteed to be valid with respect to the value of SP at
/// the end of the prologue.
virtual int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const {
virtual StackOffset
getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const {
// Always safe to dispatch to getFrameIndexReference.
return getFrameIndexReference(MF, FI, FrameReg);
}
@ -316,8 +318,8 @@ public:
/// getNonLocalFrameIndexReference - This method returns the offset used to
/// reference a frame index location. The offset can be from either FP/BP/SP
/// based on which base register is returned by llvm.localaddress.
virtual int getNonLocalFrameIndexReference(const MachineFunction &MF,
int FI) const {
virtual StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
int FI) const {
// By default, dispatch to getFrameIndexReference. Interested targets can
// override this.
Register FrameReg;

4
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
View File

@ -884,7 +884,7 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) {
// The second operand is only an offset if it's an immediate.
bool MemLoc = MI->isIndirectDebugValue();
int64_t Offset = MemLoc ? MI->getOperand(1).getImm() : 0;
auto Offset = StackOffset::getFixed(MemLoc ? MI->getOperand(1).getImm() : 0);
const DIExpression *Expr = MI->getDebugExpression();
if (Expr->getNumElements()) {
OS << '[';
@ -948,7 +948,7 @@ static bool emitDebugValueComment(const MachineInstr *MI, AsmPrinter &AP) {
}
if (MemLoc)
OS << '+' << Offset << ']';
OS << '+' << Offset.getFixed() << ']';
// NOTE: Want this comment at start of line, don't emit with AddComment.
AP.OutStreamer->emitRawComment(OS.str());

7
lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
View File

@ -1186,12 +1186,15 @@ void CodeViewDebug::collectVariableInfoFromMFTable(
// Get the frame register used and the offset.
Register FrameReg;
int FrameOffset = TFI->getFrameIndexReference(*Asm->MF, VI.Slot, FrameReg);
StackOffset FrameOffset = TFI->getFrameIndexReference(*Asm->MF, VI.Slot, FrameReg);
uint16_t CVReg = TRI->getCodeViewRegNum(FrameReg);
assert(!FrameOffset.getScalable() &&
"Frame offsets with a scalable component are not supported");
// Calculate the label ranges.
LocalVarDefRange DefRange =
createDefRangeMem(CVReg, FrameOffset + ExprOffset);
createDefRangeMem(CVReg, FrameOffset.getFixed() + ExprOffset);
for (const InsnRange &Range : Scope->getRanges()) {
const MCSymbol *Begin = getLabelBeforeInsn(Range.first);

9
lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
View File

@ -730,10 +730,15 @@ DIE *DwarfCompileUnit::constructVariableDIEImpl(const DbgVariable &DV,
Register FrameReg;
const DIExpression *Expr = Fragment.Expr;
const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
int Offset = TFI->getFrameIndexReference(*Asm->MF, Fragment.FI, FrameReg);
StackOffset Offset =
TFI->getFrameIndexReference(*Asm->MF, Fragment.FI, FrameReg);
DwarfExpr.addFragmentOffset(Expr);
assert(!Offset.getScalable() &&
"Frame offsets with a scalable component are not supported");
SmallVector<uint64_t, 8> Ops;
DIExpression::appendOffset(Ops, Offset);
DIExpression::appendOffset(Ops, Offset.getFixed());
// According to
// https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf
// cuda-gdb requires DW_AT_address_class for all variables to be able to

20
lib/CodeGen/AsmPrinter/WinException.cpp
View File

@ -330,22 +330,24 @@ int WinException::getFrameIndexOffset(int FrameIndex,
const TargetFrameLowering &TFI = *Asm->MF->getSubtarget().getFrameLowering();
Register UnusedReg;
if (Asm->MAI->usesWindowsCFI()) {
int Offset =
StackOffset Offset =
TFI.getFrameIndexReferencePreferSP(*Asm->MF, FrameIndex, UnusedReg,
/*IgnoreSPUpdates*/ true);
assert(UnusedReg ==
Asm->MF->getSubtarget()
.getTargetLowering()
->getStackPointerRegisterToSaveRestore());
return Offset;
return Offset.getFixed();
}
// For 32-bit, offsets should be relative to the end of the EH registration
// node. For 64-bit, it's relative to SP at the end of the prologue.
assert(FuncInfo.EHRegNodeEndOffset != INT_MAX);
int Offset = TFI.getFrameIndexReference(*Asm->MF, FrameIndex, UnusedReg);
Offset += FuncInfo.EHRegNodeEndOffset;
return Offset;
StackOffset Offset = TFI.getFrameIndexReference(*Asm->MF, FrameIndex, UnusedReg);
Offset += StackOffset::getFixed(FuncInfo.EHRegNodeEndOffset);
assert(!Offset.getScalable() &&
"Frame offsets with a scalable component are not supported");
return Offset.getFixed();
}
namespace {
@ -942,7 +944,7 @@ void WinException::emitEHRegistrationOffsetLabel(const WinEHFuncInfo &FuncInfo,
int FI = FuncInfo.EHRegNodeFrameIndex;
if (FI != INT_MAX) {
const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
Offset = TFI->getNonLocalFrameIndexReference(*Asm->MF, FI);
Offset = TFI->getNonLocalFrameIndexReference(*Asm->MF, FI).getFixed();
}
MCContext &Ctx = Asm->OutContext;
@ -1006,7 +1008,8 @@ void WinException::emitExceptHandlerTable(const MachineFunction *MF) {
Register UnusedReg;
const TargetFrameLowering *TFI = MF->getSubtarget().getFrameLowering();
int SSPIdx = MFI.getStackProtectorIndex();
GSCookieOffset = TFI->getFrameIndexReference(*MF, SSPIdx, UnusedReg);
GSCookieOffset =
TFI->getFrameIndexReference(*MF, SSPIdx, UnusedReg).getFixed();
}
// Retrieve the EH Guard slot.
@ -1016,7 +1019,8 @@ void WinException::emitExceptHandlerTable(const MachineFunction *MF) {
Register UnusedReg;
const TargetFrameLowering *TFI = MF->getSubtarget().getFrameLowering();
int EHGuardIdx = FuncInfo.EHGuardFrameIndex;
EHCookieOffset = TFI->getFrameIndexReference(*MF, EHGuardIdx, UnusedReg);
EHCookieOffset =
TFI->getFrameIndexReference(*MF, EHGuardIdx, UnusedReg).getFixed();
}
AddComment("GSCookieOffset");

5
lib/CodeGen/GCRootLowering.cpp
View File

@ -296,7 +296,10 @@ void GCMachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
} else {
Register FrameReg; // FIXME: surely GCRoot ought to store the
// register that the offset is from?
RI->StackOffset = TFI->getFrameIndexReference(MF, RI->Num, FrameReg);
auto FrameOffset = TFI->getFrameIndexReference(MF, RI->Num, FrameReg);
assert(!FrameOffset.getScalable() &&
"Frame offsets with a scalable component are not supported");
RI->StackOffset = FrameOffset.getFixed();
++RI;
}
}

6
lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
View File

@ -1576,8 +1576,10 @@ InstrRefBasedLDV::extractSpillBaseRegAndOffset(const MachineInstr &MI) {
int FI = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
const MachineBasicBlock *MBB = MI.getParent();
Register Reg;
int Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
return {Reg, Offset};
StackOffset Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
assert(!Offset.getScalable() &&
"Frame offsets with a scalable component are not supported");
return {Reg, static_cast<int>(Offset.getFixed())};
}
/// End all previous ranges related to @MI and start a new range from @MI

6
lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
View File

@ -983,8 +983,10 @@ VarLocBasedLDV::extractSpillBaseRegAndOffset(const MachineInstr &MI) {
int FI = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
const MachineBasicBlock *MBB = MI.getParent();
Register Reg;
int Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
return {Reg, Offset};
StackOffset Offset = TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
assert(!Offset.getScalable() &&
"Frame offsets with a scalable component are not supported");
return {Reg, static_cast<int>(Offset.getFixed())};
}
/// Try to salvage the debug entry value if we encounter a new debug value

12
lib/CodeGen/PrologEpilogInserter.cpp
View File

@ -1209,8 +1209,10 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
unsigned FrameIdx = MI.getOperand(0).getIndex();
unsigned Size = MF.getFrameInfo().getObjectSize(FrameIdx);
int64_t Offset =
StackOffset Offset =
TFI->getFrameIndexReference(MF, FrameIdx, Reg);
assert(!Offset.getScalable() &&
"Frame offsets with a scalable component are not supported");
MI.getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
MI.getOperand(0).setIsDebug();
@ -1236,7 +1238,7 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
// Make the DBG_VALUE direct.
MI.getDebugOffset().ChangeToRegister(0, false);
}
DIExpr = DIExpression::prepend(DIExpr, PrependFlags, Offset);
DIExpr = DIExpression::prepend(DIExpr, PrependFlags, Offset.getFixed());
MI.getDebugExpressionOp().setMetadata(DIExpr);
continue;
}
@ -1252,9 +1254,11 @@ void PEI::replaceFrameIndices(MachineBasicBlock *BB, MachineFunction &MF,
"DBG_VALUE machine instruction");
Register Reg;
MachineOperand &Offset = MI.getOperand(i + 1);
int refOffset = TFI->getFrameIndexReferencePreferSP(
StackOffset refOffset = TFI->getFrameIndexReferencePreferSP(
MF, MI.getOperand(i).getIndex(), Reg, /*IgnoreSPUpdates*/ false);
Offset.setImm(Offset.getImm() + refOffset + SPAdj);
assert(!refOffset.getScalable() &&
"Frame offsets with a scalable component are not supported");
Offset.setImm(Offset.getImm() + refOffset.getFixed() + SPAdj);
MI.getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
continue;
}

11
lib/CodeGen/TargetFrameLoweringImpl.cpp
View File

@ -41,9 +41,9 @@ bool TargetFrameLowering::enableCalleeSaveSkip(const MachineFunction &MF) const
/// frame of the specified index, along with the frame register used
/// (in output arg FrameReg). This is the default implementation which
/// is overridden for some targets.
int TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
@ -52,8 +52,9 @@ int TargetFrameLowering::getFrameIndexReference(const MachineFunction &MF,
// something different.
FrameReg = RI->getFrameRegister(MF);
return MFI.getObjectOffset(FI) + MFI.getStackSize() -
getOffsetOfLocalArea() + MFI.getOffsetAdjustment();
return StackOffset::getFixed(MFI.getObjectOffset(FI) + MFI.getStackSize() -
getOffsetOfLocalArea() +
MFI.getOffsetAdjustment());
}
bool TargetFrameLowering::needsFrameIndexResolution(

27
lib/Target/AArch64/AArch64FrameLowering.cpp
View File

@ -1803,20 +1803,20 @@ void AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
/// debug info. It's the same as what we use for resolving the code-gen
/// references for now. FIXME: This can go wrong when references are
/// SP-relative and simple call frames aren't used.
int AArch64FrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
AArch64FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
return resolveFrameIndexReference(
MF, FI, FrameReg,
/*PreferFP=*/
MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress),
/*ForSimm=*/false)
.getFixed();
MF, FI, FrameReg,
/*PreferFP=*/
MF.getFunction().hasFnAttribute(Attribute::SanitizeHWAddress),
/*ForSimm=*/false);
}
int AArch64FrameLowering::getNonLocalFrameIndexReference(
const MachineFunction &MF, int FI) const {
return getSEHFrameIndexOffset(MF, FI);
StackOffset
AArch64FrameLowering::getNonLocalFrameIndexReference(const MachineFunction &MF,
int FI) const {
return StackOffset::getFixed(getSEHFrameIndexOffset(MF, FI));
}
static StackOffset getFPOffset(const MachineFunction &MF,
@ -1839,6 +1839,7 @@ static StackOffset getStackOffset(const MachineFunction &MF,
return StackOffset::getFixed(ObjectOffset + (int64_t)MFI.getStackSize());
}
// TODO: This function currently does not work for scalable vectors.
int AArch64FrameLowering::getSEHFrameIndexOffset(const MachineFunction &MF,
int FI) const {
const auto *RegInfo = static_cast<const AArch64RegisterInfo *>(
@ -3273,7 +3274,7 @@ void AArch64FrameLowering::processFunctionBeforeFrameIndicesReplaced(
/// For Win64 AArch64 EH, the offset to the Unwind object is from the SP
/// before the update. This is easily retrieved as it is exactly the offset
/// that is set in processFunctionBeforeFrameFinalized.
int AArch64FrameLowering::getFrameIndexReferencePreferSP(
StackOffset AArch64FrameLowering::getFrameIndexReferencePreferSP(
const MachineFunction &MF, int FI, Register &FrameReg,
bool IgnoreSPUpdates) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
@ -3281,7 +3282,7 @@ int AArch64FrameLowering::getFrameIndexReferencePreferSP(
LLVM_DEBUG(dbgs() << "Offset from the SP for " << FI << " is "
<< MFI.getObjectOffset(FI) << "\n");
FrameReg = AArch64::SP;
return MFI.getObjectOffset(FI);
return StackOffset::getFixed(MFI.getObjectOffset(FI));
}
return getFrameIndexReference(MF, FI, FrameReg);

15
lib/Target/AArch64/AArch64FrameLowering.h
View File

@ -41,8 +41,8 @@ public:
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset resolveFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg, bool PreferFP,
bool ForSimm) const;
@ -94,11 +94,12 @@ public:
unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const;
int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const override;
int getNonLocalFrameIndexReference(const MachineFunction &MF,
int FI) const override;
StackOffset
getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const override;
StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
int FI) const override;
int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const;
bool isSupportedStackID(TargetStackID::Value ID) const override {

6
lib/Target/AArch64/AArch64RegisterInfo.cpp
View File

@ -626,8 +626,10 @@ void AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
if (MI.getOpcode() == TargetOpcode::LOCAL_ESCAPE) {
MachineOperand &FI = MI.getOperand(FIOperandNum);
int Offset = TFI->getNonLocalFrameIndexReference(MF, FrameIndex);
FI.ChangeToImmediate(Offset);
StackOffset Offset = TFI->getNonLocalFrameIndexReference(MF, FrameIndex);
assert(!Offset.getScalable() &&
"Frame offsets with a scalable component are not supported");
FI.ChangeToImmediate(Offset.getFixed());
return;
}

7
lib/Target/AMDGPU/R600FrameLowering.cpp
View File

@ -18,8 +18,9 @@ using namespace llvm;
R600FrameLowering::~R600FrameLowering() = default;
/// \returns The number of registers allocated for \p FI.
int R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
StackOffset
R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const R600RegisterInfo *RI
= MF.getSubtarget<R600Subtarget>().getRegisterInfo();
@ -44,5 +45,5 @@ int R600FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
if (FI != -1)
OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlign(FI));
return OffsetBytes / (getStackWidth(MF) * 4);
return StackOffset::getFixed(OffsetBytes / (getStackWidth(MF) * 4));
}

5
lib/Target/AMDGPU/R600FrameLowering.h
View File

@ -10,6 +10,7 @@
#define LLVM_LIB_TARGET_AMDGPU_R600FRAMELOWERING_H
#include "AMDGPUFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -24,8 +25,8 @@ public:
MachineBasicBlock &MBB) const override {}
void emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const override {}
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
bool hasFP(const MachineFunction &MF) const override {
return false;

8
lib/Target/AMDGPU/R600ISelLowering.cpp
View File

@ -1550,10 +1550,10 @@ SDValue R600TargetLowering::lowerFrameIndex(SDValue Op,
unsigned FrameIndex = FIN->getIndex();
Register IgnoredFrameReg;
unsigned Offset =
TFL->getFrameIndexReference(MF, FrameIndex, IgnoredFrameReg);
return DAG.getConstant(Offset * 4 * TFL->getStackWidth(MF), SDLoc(Op),
Op.getValueType());
StackOffset Offset =
TFL->getFrameIndexReference(MF, FrameIndex, IgnoredFrameReg);
return DAG.getConstant(Offset.getFixed() * 4 * TFL->getStackWidth(MF),
SDLoc(Op), Op.getValueType());
}
CCAssignFn *R600TargetLowering::CCAssignFnForCall(CallingConv::ID CC,

2
lib/Target/AMDGPU/R600InstrInfo.cpp
View File

@ -1226,7 +1226,7 @@ int R600InstrInfo::getIndirectIndexEnd(const MachineFunction &MF) const {
const R600FrameLowering *TFL = ST.getFrameLowering();
Register IgnoredFrameReg;
Offset = TFL->getFrameIndexReference(MF, -1, IgnoredFrameReg);
Offset = TFL->getFrameIndexReference(MF, -1, IgnoredFrameReg).getFixed();
return getIndirectIndexBegin(MF) + Offset;
}

7
lib/Target/AMDGPU/SIFrameLowering.cpp
View File

@ -1159,12 +1159,13 @@ static bool allSGPRSpillsAreDead(const MachineFunction &MF) {
}
#endif
int SIFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
StackOffset SIFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
const SIRegisterInfo *RI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo();
FrameReg = RI->getFrameRegister(MF);
return MF.getFrameInfo().getObjectOffset(FI);
return StackOffset::getFixed(MF.getFrameInfo().getObjectOffset(FI));
}
void SIFrameLowering::processFunctionBeforeFrameFinalized(

5
lib/Target/AMDGPU/SIFrameLowering.h
View File

@ -10,6 +10,7 @@
#define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
#include "AMDGPUFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -31,8 +32,8 @@ public:
MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS = nullptr) const override;

7
lib/Target/ARM/ARMFrameLowering.cpp
View File

@ -883,9 +883,10 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
/// debug info. It's the same as what we use for resolving the code-gen
/// references for now. FIXME: This can go wrong when references are
/// SP-relative and simple call frames aren't used.
int ARMFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
return ResolveFrameIndexReference(MF, FI, FrameReg, 0);
StackOffset ARMFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
return StackOffset::getFixed(ResolveFrameIndexReference(MF, FI, FrameReg, 0));
}
int ARMFrameLowering::ResolveFrameIndexReference(const MachineFunction &MF,

5
lib/Target/ARM/ARMFrameLowering.h
View File

@ -10,6 +10,7 @@
#define LLVM_LIB_TARGET_ARM_ARMFRAMELOWERING_H
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -47,8 +48,8 @@ public:
bool hasFP(const MachineFunction &MF) const override;
bool hasReservedCallFrame(const MachineFunction &MF) const override;
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg, int SPAdj) const;

11
lib/Target/Hexagon/HexagonFrameLowering.cpp
View File

@ -1104,7 +1104,8 @@ void HexagonFrameLowering::insertCFIInstructionsAt(MachineBasicBlock &MBB,
Offset = MFI.getObjectOffset(F->getFrameIdx());
} else {
Register FrameReg;
Offset = getFrameIndexReference(MF, F->getFrameIdx(), FrameReg);
Offset =
getFrameIndexReference(MF, F->getFrameIdx(), FrameReg).getFixed();
}
// Subtract 8 to make room for R30 and R31, which are added above.
Offset -= 8;
@ -1256,9 +1257,9 @@ static const char *getSpillFunctionFor(unsigned MaxReg, SpillKind SpillType,
return nullptr;
}
int HexagonFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
HexagonFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
auto &MFI = MF.getFrameInfo();
auto &HRI = *MF.getSubtarget<HexagonSubtarget>().getRegisterInfo();
@ -1354,7 +1355,7 @@ int HexagonFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int RealOffset = Offset;
if (!UseFP && !UseAP)
RealOffset = FrameSize+Offset;
return RealOffset;
return StackOffset::getFixed(RealOffset);
}
bool HexagonFrameLowering::insertCSRSpillsInBlock(MachineBasicBlock &MBB,

4
lib/Target/Hexagon/HexagonFrameLowering.h
View File

@ -83,8 +83,8 @@ public:
return true;
}
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
bool hasFP(const MachineFunction &MF) const override;
const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries)

2
lib/Target/Hexagon/HexagonRegisterInfo.cpp
View File

@ -207,7 +207,7 @@ void HexagonRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int FI = MI.getOperand(FIOp).getIndex();
// Select the base pointer (BP) and calculate the actual offset from BP
// to the beginning of the object at index FI.
int Offset = HFI.getFrameIndexReference(MF, FI, BP);
int Offset = HFI.getFrameIndexReference(MF, FI, BP).getFixed();
// Add the offset from the instruction.
int RealOffset = Offset + MI.getOperand(FIOp+1).getImm();
bool IsKill = false;

11
lib/Target/Mips/MipsSEFrameLowering.cpp
View File

@ -774,9 +774,9 @@ void MipsSEFrameLowering::emitInterruptEpilogueStub(
.addImm(0);
}
int MipsSEFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
MipsSEFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
MipsABIInfo ABI = STI.getABI();
@ -785,8 +785,9 @@ int MipsSEFrameLowering::getFrameIndexReference(const MachineFunction &MF,
else
FrameReg = hasBP(MF) ? ABI.GetBasePtr() : ABI.GetStackPtr();
return MFI.getObjectOffset(FI) + MFI.getStackSize() -
getOffsetOfLocalArea() + MFI.getOffsetAdjustment();
return StackOffset::getFixed(MFI.getObjectOffset(FI) + MFI.getStackSize() -
getOffsetOfLocalArea() +
MFI.getOffsetAdjustment());
}
bool MipsSEFrameLowering::spillCalleeSavedRegisters(

5
lib/Target/Mips/MipsSEFrameLowering.h
View File

@ -10,6 +10,7 @@
#define LLVM_LIB_TARGET_MIPS_MIPSSEFRAMELOWERING_H
#include "MipsFrameLowering.h"
#include "llvm/Support/TypeSize.h"
#include <vector>
namespace llvm {
@ -27,8 +28,8 @@ public:
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,

9
lib/Target/NVPTX/NVPTXFrameLowering.cpp
View File

@ -63,12 +63,13 @@ void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
}
}
int NVPTXFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
NVPTXFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
FrameReg = NVPTX::VRDepot;
return MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
return StackOffset::getFixed(MFI.getObjectOffset(FI) -
getOffsetOfLocalArea());
}
void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,

5
lib/Target/NVPTX/NVPTXFrameLowering.h
View File

@ -14,6 +14,7 @@
#define LLVM_LIB_TARGET_NVPTX_NVPTXFRAMELOWERING_H
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -24,8 +25,8 @@ public:
bool hasFP(const MachineFunction &MF) const override;
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
MachineBasicBlock::iterator
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,

3
lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp
View File

@ -69,7 +69,8 @@ bool NVPTXPrologEpilogPass::runOnMachineFunction(MachineFunction &MF) {
"operand of a DBG_VALUE machine instruction");
Register Reg;
int64_t Offset =
TFI.getFrameIndexReference(MF, MI.getOperand(0).getIndex(), Reg);
TFI.getFrameIndexReference(MF, MI.getOperand(0).getIndex(), Reg)
.getFixed();
MI.getOperand(0).ChangeToRegister(Reg, /*isDef=*/false);
MI.getOperand(0).setIsDebug();
auto *DIExpr = DIExpression::prepend(

8
lib/Target/RISCV/RISCVFrameLowering.cpp
View File

@ -564,9 +564,9 @@ void RISCVFrameLowering::emitEpilogue(MachineFunction &MF,
emitSCSEpilogue(MF, MBB, MBBI, DL);
}
int RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
const auto *RVFI = MF.getInfo<RISCVMachineFunctionInfo>();
@ -618,7 +618,7 @@ int RISCVFrameLowering::getFrameIndexReference(const MachineFunction &MF,
Offset += RVFI->getLibCallStackSize();
}
}
return Offset;
return StackOffset::getFixed(Offset);
}
void RISCVFrameLowering::determineCalleeSaves(MachineFunction &MF,

5
lib/Target/RISCV/RISCVFrameLowering.h
View File

@ -14,6 +14,7 @@
#define LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
class RISCVSubtarget;
@ -29,8 +30,8 @@ public:
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS) const override;

7
lib/Target/RISCV/RISCVRegisterInfo.cpp
View File

@ -152,9 +152,10 @@ void RISCVRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
Register FrameReg;
int Offset =
getFrameLowering(MF)->getFrameIndexReference(MF, FrameIndex, FrameReg) +
MI.getOperand(FIOperandNum + 1).getImm();
int Offset = getFrameLowering(MF)
->getFrameIndexReference(MF, FrameIndex, FrameReg)
.getFixed() +
MI.getOperand(FIOperandNum + 1).getImm();
if (!isInt<32>(Offset)) {
report_fatal_error(

10
lib/Target/Sparc/SparcFrameLowering.cpp
View File

@ -257,9 +257,9 @@ bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
MFI.isFrameAddressTaken();
}
int SparcFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
SparcFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
const SparcSubtarget &Subtarget = MF.getSubtarget<SparcSubtarget>();
const MachineFrameInfo &MFI = MF.getFrameInfo();
const SparcRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
@ -295,10 +295,10 @@ int SparcFrameLowering::getFrameIndexReference(const MachineFunction &MF,
if (UseFP) {
FrameReg = RegInfo->getFrameRegister(MF);
return FrameOffset;
return StackOffset::getFixed(FrameOffset);
} else {
FrameReg = SP::O6; // %sp
return FrameOffset + MF.getFrameInfo().getStackSize();
return StackOffset::getFixed(FrameOffset + MF.getFrameInfo().getStackSize());
}
}

5
lib/Target/Sparc/SparcFrameLowering.h
View File

@ -15,6 +15,7 @@
#include "Sparc.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -38,8 +39,8 @@ public:
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS = nullptr) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
/// targetHandlesStackFrameRounding - Returns true if the target is
/// responsible for rounding up the stack frame (probably at emitPrologue

2
lib/Target/Sparc/SparcRegisterInfo.cpp
View File

@ -175,7 +175,7 @@ SparcRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
Register FrameReg;
int Offset;
Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg).getFixed();
Offset += MI.getOperand(FIOperandNum + 1).getImm();

15
lib/Target/SystemZ/SystemZFrameLowering.cpp
View File

@ -565,7 +565,8 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
Register IgnoredFrameReg;
int64_t Offset =
getFrameIndexReference(MF, Save.getFrameIdx(), IgnoredFrameReg);
getFrameIndexReference(MF, Save.getFrameIdx(), IgnoredFrameReg)
.getFixed();
unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createOffset(
nullptr, DwarfReg, SPOffsetFromCFA + Offset));
@ -725,14 +726,14 @@ SystemZFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
return true;
}
int SystemZFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
StackOffset
SystemZFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
// Our incoming SP is actually SystemZMC::CallFrameSize below the CFA, so
// add that difference here.
int64_t Offset =
TargetFrameLowering::getFrameIndexReference(MF, FI, FrameReg);
return Offset + SystemZMC::CallFrameSize;
StackOffset Offset =
TargetFrameLowering::getFrameIndexReference(MF, FI, FrameReg);
return Offset + StackOffset::getFixed(SystemZMC::CallFrameSize);
}
MachineBasicBlock::iterator SystemZFrameLowering::

5
lib/Target/SystemZ/SystemZFrameLowering.h
View File

@ -11,6 +11,7 @@
#include "llvm/ADT/IndexedMap.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
class SystemZTargetMachine;
@ -47,8 +48,8 @@ public:
MachineBasicBlock &PrologMBB) const override;
bool hasFP(const MachineFunction &MF) const override;
bool hasReservedCallFrame(const MachineFunction &MF) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
MachineBasicBlock::iterator
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const override;

5
lib/Target/SystemZ/SystemZRegisterInfo.cpp
View File

@ -266,8 +266,9 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
// Decompose the frame index into a base and offset.
int FrameIndex = MI->getOperand(FIOperandNum).getIndex();
Register BasePtr;
int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) +
MI->getOperand(FIOperandNum + 1).getImm());
int64_t Offset =
(TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed() +
MI->getOperand(FIOperandNum + 1).getImm());
// Special handling of dbg_value instructions.
if (MI->isDebugValue()) {

13
lib/Target/VE/VEFrameLowering.cpp
View File

@ -320,8 +320,9 @@ bool VEFrameLowering::hasBP(const MachineFunction &MF) const {
return MFI.hasVarSizedObjects() && TRI->needsStackRealignment(MF);
}
int VEFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
StackOffset VEFrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
const VERegisterInfo *RegInfo = STI.getRegisterInfo();
const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
@ -333,7 +334,8 @@ int VEFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
// If there's a leaf proc, all offsets need to be %sp-based,
// because we haven't caused %fp to actually point to our frame.
FrameReg = VE::SX11; // %sp
return FrameOffset + MF.getFrameInfo().getStackSize();
return StackOffset::getFixed(FrameOffset +
MF.getFrameInfo().getStackSize());
}
if (RegInfo->needsStackRealignment(MF) && !isFixed) {
// If there is dynamic stack realignment, all local object
@ -343,11 +345,12 @@ int VEFrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
FrameReg = VE::SX17; // %bp
else
FrameReg = VE::SX11; // %sp
return FrameOffset + MF.getFrameInfo().getStackSize();
return StackOffset::getFixed(FrameOffset +
MF.getFrameInfo().getStackSize());
}
// Finally, default to using %fp.
FrameReg = RegInfo->getFrameRegister(MF);
return FrameOffset;
return StackOffset::getFixed(FrameOffset);
}
bool VEFrameLowering::isLeafProc(MachineFunction &MF) const {

5
lib/Target/VE/VEFrameLowering.h
View File

@ -15,6 +15,7 @@
#include "VE.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -48,8 +49,8 @@ public:
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS = nullptr) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
const SpillSlot *
getCalleeSavedSpillSlots(unsigned &NumEntries) const override {

2
lib/Target/VE/VERegisterInfo.cpp
View File

@ -116,7 +116,7 @@ void VERegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
Register FrameReg;
int Offset;
Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg);
Offset = TFI->getFrameIndexReference(MF, FrameIndex, FrameReg).getFixed();
Offset += MI.getOperand(FIOperandNum + 2).getImm();

56
lib/Target/X86/X86FrameLowering.cpp
View File

@ -1690,7 +1690,7 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
assert(Personality == EHPersonality::MSVC_CXX);
Register FrameReg;
int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg).getFixed();
// ESP is the first field, so no extra displacement is needed.
addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
false, EHRegOffset)
@ -1711,8 +1711,9 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
if (IsWin64Prologue && IsFunclet)
Offset = getWin64EHFrameIndexRef(MF, FI, IgnoredFrameReg);
else
Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg) +
SEHFrameOffset;
Offset =
getFrameIndexReference(MF, FI, IgnoredFrameReg).getFixed() +
SEHFrameOffset;
HasWinCFI = true;
assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
@ -1784,7 +1785,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
Register UsedReg;
int Offset =
getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg)
.getFixed();
assert(UsedReg == BasePtr);
addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
.addReg(FramePtr)
@ -1862,7 +1864,8 @@ X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
Register SPReg;
int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg,
/*IgnoreSPUpdates*/ true);
/*IgnoreSPUpdates*/ true)
.getFixed();
assert(Offset >= 0 && SPReg == TRI->getStackRegister());
return static_cast<unsigned>(Offset);
}
@ -2090,8 +2093,9 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
}
}
int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const {
StackOffset X86FrameLowering::getFrameIndexReference(const MachineFunction &MF,
int FI,
Register &FrameReg) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
bool IsFixed = MFI.isFixedObjectIndex(FI);
@ -2138,7 +2142,7 @@ int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
if (FI && FI == X86FI->getFAIndex())
return -SEHFrameOffset;
return StackOffset::getFixed(-SEHFrameOffset);
// FPDelta is the offset from the "traditional" FP location of the old base
// pointer followed by return address and the location required by the
@ -2154,23 +2158,23 @@ int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
if (FI < 0) {
// Skip the saved EBP.
return Offset + SlotSize + FPDelta;
return StackOffset::getFixed(Offset + SlotSize + FPDelta);
} else {
assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize)));
return Offset + StackSize;
return StackOffset::getFixed(Offset + StackSize);
}
} else if (TRI->needsStackRealignment(MF)) {
if (FI < 0) {
// Skip the saved EBP.
return Offset + SlotSize + FPDelta;
return StackOffset::getFixed(Offset + SlotSize + FPDelta);
} else {
assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize)));
return Offset + StackSize;
return StackOffset::getFixed(Offset + StackSize);
}
// FIXME: Support tail calls
} else {
if (!HasFP)
return Offset + StackSize;
return StackOffset::getFixed(Offset + StackSize);
// Skip the saved EBP.
Offset += SlotSize;
@ -2181,7 +2185,7 @@ int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
Offset -= TailCallReturnAddrDelta;
}
return Offset + FPDelta;
return StackOffset::getFixed(Offset + FPDelta);
}
int X86FrameLowering::getWin64EHFrameIndexRef(const MachineFunction &MF, int FI,
@ -2192,24 +2196,27 @@ int X86FrameLowering::getWin64EHFrameIndexRef(const MachineFunction &MF, int FI,
const auto it = WinEHXMMSlotInfo.find(FI);
if (it == WinEHXMMSlotInfo.end())
return getFrameIndexReference(MF, FI, FrameReg);
return getFrameIndexReference(MF, FI, FrameReg).getFixed();
FrameReg = TRI->getStackRegister();
return alignDown(MFI.getMaxCallFrameSize(), getStackAlign().value()) +
it->second;
}
int X86FrameLowering::getFrameIndexReferenceSP(const MachineFunction &MF,
int FI, Register &FrameReg,
int Adjustment) const {
StackOffset
X86FrameLowering::getFrameIndexReferenceSP(const MachineFunction &MF, int FI,
Register &FrameReg,
int Adjustment) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
FrameReg = TRI->getStackRegister();
return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
return StackOffset::getFixed(MFI.getObjectOffset(FI) -
getOffsetOfLocalArea() + Adjustment);
}
int X86FrameLowering::getFrameIndexReferencePreferSP(
const MachineFunction &MF, int FI, Register &FrameReg,
bool IgnoreSPUpdates) const {
StackOffset
X86FrameLowering::getFrameIndexReferencePreferSP(const MachineFunction &MF,
int FI, Register &FrameReg,
bool IgnoreSPUpdates) const {
const MachineFrameInfo &MFI = MF.getFrameInfo();
// Does not include any dynamic realign.
@ -3299,7 +3306,7 @@ MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
}
Register UsedReg;
int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg).getFixed();
int EndOffset = -EHRegOffset - EHRegSize;
FuncInfo.EHRegNodeEndOffset = EndOffset;
@ -3322,7 +3329,8 @@ MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
// MOV32rm SavedEBPOffset(%esi), %ebp
assert(X86FI->getHasSEHFramePtrSave());
int Offset =
getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg)
.getFixed();
assert(UsedReg == BasePtr);
addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
UsedReg, true, Offset)

16
lib/Target/X86/X86FrameLowering.h
View File

@ -14,6 +14,7 @@
#define LLVM_LIB_TARGET_X86_X86FRAMELOWERING_H
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/TypeSize.h"
namespace llvm {
@ -102,16 +103,17 @@ public:
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override;
bool needsFrameIndexResolution(const MachineFunction &MF) const override;
int getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const override;
int getWin64EHFrameIndexRef(const MachineFunction &MF, int FI,
Register &SPReg) const;
int getFrameIndexReferenceSP(const MachineFunction &MF, int FI,
Register &SPReg, int Adjustment) const;
int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const override;
StackOffset getFrameIndexReferenceSP(const MachineFunction &MF, int FI,
Register &SPReg, int Adjustment) const;
StackOffset
getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const override;
MachineBasicBlock::iterator
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,

5
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -725,11 +725,12 @@ X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
assert((!needsStackRealignment(MF) ||
MF.getFrameInfo().isFixedObjectIndex(FrameIndex)) &&
"Return instruction can only reference SP relative frame objects");
FIOffset = TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0);
FIOffset =
TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0).getFixed();
} else if (TFI->Is64Bit && (MBB.isEHFuncletEntry() || IsEHFuncletEpilogue)) {
FIOffset = TFI->getWin64EHFrameIndexRef(MF, FrameIndex, BasePtr);
} else {
FIOffset = TFI->getFrameIndexReference(MF, FrameIndex, BasePtr);
FIOffset = TFI->getFrameIndexReference(MF, FrameIndex, BasePtr).getFixed();
}
// LOCAL_ESCAPE uses a single offset, with no register. It only works in the