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DAGCombine: Combine BUILD_VECTOR to TRUNCATE
Summary: Add a combine for creating a truncate to replace a build_vector composed of extracts with indices that form a stride-2^N series. Example: v8i32 V = ... v4i32 build_vector((extract_elt V, 0), (extract_elt V, 2), (extract_elt V, 4), (extract_elt V, 6)) --> v4i32 truncate (bitcast V to v4i64) Related discussion in llvm-dev about canonicalizing shuffles to truncates in LLVM IR: http://lists.llvm.org/pipermail/llvm-dev/2017-January/108936.html. Reviewers: spatel, RKSimon, efriedma, igorb, craig.topper, wolfgangp, delena Reviewed By: delena Subscribers: guyblank, delena, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D34077 llvm-svn: 307036
This commit is contained in:
Zvi Rackover
parent
80a9b3cbaf
commit
e1f310fac6
@ -2726,6 +2726,18 @@ public:
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return true;
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}
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// Return true if it is profitable to combine a BUILD_VECTOR to a TRUNCATE.
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// Example of such a combine:
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// v4i32 build_vector((extract_elt V, 0),
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// (extract_elt V, 2),
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// (extract_elt V, 4),
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// (extract_elt V, 6))
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// -->
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// v4i32 truncate (bitcast V to v4i64)
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virtual bool isDesirableToCombineBuildVectorToTruncate() const {
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return false;
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}
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/// Return true if the target has native support for the specified value type
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/// and it is 'desirable' to use the type for the given node type. e.g. On x86
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/// i16 is legal, but undesirable since i16 instruction encodings are longer
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@ -400,6 +400,7 @@ namespace {
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SDValue reduceBuildVecExtToExtBuildVec(SDNode *N);
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SDValue reduceBuildVecConvertToConvertBuildVec(SDNode *N);
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SDValue reduceBuildVecToShuffle(SDNode *N);
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SDValue reduceBuildVecToTrunc(SDNode *N);
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SDValue createBuildVecShuffle(const SDLoc &DL, SDNode *N,
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ArrayRef<int> VectorMask, SDValue VecIn1,
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SDValue VecIn2, unsigned LeftIdx);
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@ -14228,6 +14229,73 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
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return Shuffles[0];
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}
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// Check to see if this is a BUILD_VECTOR of a bunch of EXTRACT_VECTOR_ELT
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// operations which can be matched to a truncate.
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SDValue DAGCombiner::reduceBuildVecToTrunc(SDNode *N) {
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// TODO: Add support for big-endian.
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if (DAG.getDataLayout().isBigEndian())
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return SDValue();
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if (N->getNumOperands() < 2)
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return SDValue();
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SDLoc DL(N);
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EVT VT = N->getValueType(0);
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unsigned NumElems = N->getNumOperands();
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if (!isTypeLegal(VT))
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return SDValue();
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// If the input is something other than an EXTRACT_VECTOR_ELT with a constant
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// index, bail out.
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// TODO: Allow undef elements in some cases?
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if (any_of(N->ops(), [VT](SDValue Op) {
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return Op.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
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!isa<ConstantSDNode>(Op.getOperand(1)) ||
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Op.getValueType() != VT.getVectorElementType();
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}))
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return SDValue();
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// Helper for obtaining an EXTRACT_VECTOR_ELT's constant index
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auto GetExtractIdx = [](SDValue Extract) {
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return cast<ConstantSDNode>(Extract.getOperand(1))->getSExtValue();
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};
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// The first BUILD_VECTOR operand must be an an extract from index zero
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// (assuming no undef and little-endian).
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if (GetExtractIdx(N->getOperand(0)) != 0)
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return SDValue();
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// Compute the stride from the first index.
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int Stride = GetExtractIdx(N->getOperand(1));
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SDValue ExtractedFromVec = N->getOperand(0).getOperand(0);
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// Proceed only if the stride and the types can be matched to a truncate.
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if ((Stride == 1 || !isPowerOf2_32(Stride)) ||
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(ExtractedFromVec.getValueType().getVectorNumElements() !=
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Stride * NumElems) ||
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(VT.getScalarSizeInBits() * Stride > 64))
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return SDValue();
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// Check remaining operands are consistent with the computed stride.
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for (unsigned i = 1; i != NumElems; ++i) {
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SDValue Op = N->getOperand(i);
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if ((Op.getOperand(0) != ExtractedFromVec) ||
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(GetExtractIdx(Op) != Stride * i))
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return SDValue();
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}
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// All checks were ok, construct the truncate.
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LLVMContext &Ctx = *DAG.getContext();
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EVT NewVT = VT.getVectorVT(
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Ctx, EVT::getIntegerVT(Ctx, VT.getScalarSizeInBits() * Stride), NumElems);
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EVT TruncVT =
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VT.isFloatingPoint() ? VT.changeVectorElementTypeToInteger() : VT;
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SDValue Res = DAG.getBitcast(NewVT, ExtractedFromVec);
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Res = DAG.getNode(ISD::TRUNCATE, SDLoc(N), TruncVT, Res);
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return DAG.getBitcast(VT, Res);
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}
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SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
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EVT VT = N->getValueType(0);
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@ -14270,6 +14338,10 @@ SDValue DAGCombiner::visitBUILD_VECTOR(SDNode *N) {
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if (SDValue V = reduceBuildVecConvertToConvertBuildVec(N))
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return V;
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if (TLI.isDesirableToCombineBuildVectorToTruncate())
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if (SDValue V = reduceBuildVecToTrunc(N))
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return V;
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if (SDValue V = reduceBuildVecToShuffle(N))
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return V;
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@ -767,6 +767,19 @@ namespace llvm {
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SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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// Return true if it is profitable to combine a BUILD_VECTOR to a TRUNCATE
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// for given operand and result types.
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// Example of such a combine:
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// v4i32 build_vector((extract_elt V, 0),
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// (extract_elt V, 2),
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// (extract_elt V, 4),
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// (extract_elt V, 6))
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// -->
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// v4i32 truncate (bitcast V to v4i64)
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bool isDesirableToCombineBuildVectorToTruncate() const override {
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return true;
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}
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/// Return true if the target has native support for
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/// the specified value type and it is 'desirable' to use the type for the
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/// given node type. e.g. On x86 i16 is legal, but undesirable since i16
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@ -37,24 +37,16 @@ define void @shuffle_v32i8_to_v16i8(<32 x i8>* %L, <16 x i8>* %S) nounwind {
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;
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; AVX512F-LABEL: shuffle_v32i8_to_v16i8:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512F-NEXT: vpmovsxwd (%rdi), %zmm0
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; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512F-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX512F-NEXT: vzeroupper
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; AVX512F-NEXT: retq
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;
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; AVX512VL-LABEL: shuffle_v32i8_to_v16i8:
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; AVX512VL: # BB#0:
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; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512VL-NEXT: vpmovsxwd (%rdi), %zmm0
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; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX512VL-NEXT: vzeroupper
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; AVX512VL-NEXT: retq
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@ -62,11 +54,7 @@ define void @shuffle_v32i8_to_v16i8(<32 x i8>* %L, <16 x i8>* %S) nounwind {
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; AVX512BW-LABEL: shuffle_v32i8_to_v16i8:
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; AVX512BW: # BB#0:
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; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
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; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX512BW-NEXT: vzeroupper
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; AVX512BW-NEXT: retq
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@ -74,12 +62,7 @@ define void @shuffle_v32i8_to_v16i8(<32 x i8>* %L, <16 x i8>* %S) nounwind {
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; AVX512BWVL-LABEL: shuffle_v32i8_to_v16i8:
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; AVX512BWVL: # BB#0:
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; AVX512BWVL-NEXT: vmovdqu (%rdi), %ymm0
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; AVX512BWVL-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512BWVL-NEXT: vmovdqu {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512BWVL-NEXT: vmovdqu %xmm0, (%rsi)
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; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rsi)
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; AVX512BWVL-NEXT: vzeroupper
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; AVX512BWVL-NEXT: retq
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%vec = load <32 x i8>, <32 x i8>* %L
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@ -166,11 +149,8 @@ define void @shuffle_v16i16_to_v8i16(<16 x i16>* %L, <8 x i16>* %S) nounwind {
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; AVX2-LABEL: shuffle_v16i16_to_v8i16:
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; AVX2: # BB#0:
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; AVX2-NEXT: vmovdqa (%rdi), %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
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; AVX2-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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@ -178,11 +158,7 @@ define void @shuffle_v16i16_to_v8i16(<16 x i16>* %L, <8 x i16>* %S) nounwind {
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; AVX512F-LABEL: shuffle_v16i16_to_v8i16:
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; AVX512F: # BB#0:
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; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
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; AVX512F-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX512F-NEXT: vzeroupper
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; AVX512F-NEXT: retq
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@ -190,42 +166,22 @@ define void @shuffle_v16i16_to_v8i16(<16 x i16>* %L, <8 x i16>* %S) nounwind {
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; AVX512VL-LABEL: shuffle_v16i16_to_v8i16:
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; AVX512VL: # BB#0:
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; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
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; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
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; AVX512VL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
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; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
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; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX512VL-NEXT: vpmovdw %ymm0, (%rsi)
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; AVX512VL-NEXT: vzeroupper
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; AVX512VL-NEXT: retq
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;
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; AVX512BW-LABEL: shuffle_v16i16_to_v8i16:
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; AVX512BW: # BB#0:
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; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
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; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1
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; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0
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; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
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; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX512BW-NEXT: vzeroupper
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; AVX512BW-NEXT: retq
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;
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; AVX512BWVL-LABEL: shuffle_v16i16_to_v8i16:
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; AVX512BWVL: # BB#0:
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; AVX512BWVL-NEXT: vmovdqu (%rdi), %ymm0
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; AVX512BWVL-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
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; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
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; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
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; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
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; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; AVX512BWVL-NEXT: vmovdqu %xmm0, (%rsi)
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; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm0
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; AVX512BWVL-NEXT: vpmovdw %ymm0, (%rsi)
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; AVX512BWVL-NEXT: vzeroupper
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; AVX512BWVL-NEXT: retq
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%vec = load <16 x i16>, <16 x i16>* %L
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@ -293,48 +249,50 @@ define void @trunc_v8i32_to_v8i16(<16 x i16>* %L, <8 x i16>* %S) nounwind {
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}
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define void @shuffle_v8i32_to_v4i32(<8 x i32>* %L, <4 x i32>* %S) nounwind {
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; AVX-LABEL: shuffle_v8i32_to_v4i32:
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; AVX: # BB#0:
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; AVX-NEXT: vmovaps (%rdi), %ymm0
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; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
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; AVX-NEXT: vmovaps %xmm0, (%rsi)
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retq
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; AVX1-LABEL: shuffle_v8i32_to_v4i32:
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; AVX1: # BB#0:
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; AVX1-NEXT: vmovaps (%rdi), %ymm0
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
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; AVX1-NEXT: vmovaps %xmm0, (%rsi)
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: shuffle_v8i32_to_v4i32:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = mem[0,2,2,3,4,6,6,7]
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
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; AVX2-NEXT: vmovdqa %xmm0, (%rsi)
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512F-LABEL: shuffle_v8i32_to_v4i32:
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; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovaps (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vextractf128 $1, %ymm0, %xmm1
|
||||
; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512F-NEXT: vmovaps %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512F-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v8i32_to_v4i32:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512VL-NEXT: vmovaps %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vpmovqd %ymm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v8i32_to_v4i32:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovaps (%rdi), %ymm0
|
||||
; AVX512BW-NEXT: vextractf128 $1, %ymm0, %xmm1
|
||||
; AVX512BW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512BW-NEXT: vmovaps %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v8i32_to_v4i32:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BWVL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512BWVL-NEXT: vmovaps %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vpmovqd %ymm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
%vec = load <8 x i32>, <8 x i32>* %L
|
||||
@ -413,11 +371,9 @@ define void @shuffle_v32i8_to_v8i8(<32 x i8>* %L, <8 x i8>* %S) nounwind {
|
||||
; AVX2-LABEL: shuffle_v32i8_to_v8i8:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
|
||||
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
|
||||
; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; AVX2-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX2-NEXT: vzeroupper
|
||||
; AVX2-NEXT: retq
|
||||
@ -425,11 +381,8 @@ define void @shuffle_v32i8_to_v8i8(<32 x i8>* %L, <8 x i8>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v32i8_to_v8i8:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
|
||||
; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; AVX512F-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
@ -437,39 +390,23 @@ define void @shuffle_v32i8_to_v8i8(<32 x i8>* %L, <8 x i8>* %S) nounwind {
|
||||
; AVX512VL-LABEL: shuffle_v32i8_to_v8i8:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX512VL-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vpmovdb %ymm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v32i8_to_v8i8:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0
|
||||
; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
|
||||
; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v32i8_to_v8i8:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
|
||||
; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
|
||||
; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; AVX512BWVL-NEXT: vpmovwb %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
%vec = load <32 x i8>, <32 x i8>* %L
|
||||
@ -542,26 +479,19 @@ define void @trunc_v8i32_to_v8i8(<32 x i8>* %L, <8 x i8>* %S) nounwind {
|
||||
define void @shuffle_v16i16_to_v4i16(<16 x i16>* %L, <4 x i16>* %S) nounwind {
|
||||
; AVX1-LABEL: shuffle_v16i16_to_v4i16:
|
||||
; AVX1: # BB#0:
|
||||
; AVX1-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX1-NEXT: vmovaps (%rdi), %ymm0
|
||||
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; AVX1-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX1-NEXT: vzeroupper
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: shuffle_v16i16_to_v4i16:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = mem[0,2,2,3,4,6,6,7]
|
||||
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
|
||||
; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; AVX2-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX2-NEXT: vzeroupper
|
||||
; AVX2-NEXT: retq
|
||||
@ -569,12 +499,8 @@ define void @shuffle_v16i16_to_v4i16(<16 x i16>* %L, <4 x i16>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v16i16_to_v4i16:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; AVX512F-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
@ -582,31 +508,23 @@ define void @shuffle_v16i16_to_v4i16(<16 x i16>* %L, <4 x i16>* %S) nounwind {
|
||||
; AVX512VL-LABEL: shuffle_v16i16_to_v4i16:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512VL-NEXT: vpmovdw %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vpmovqw %ymm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v16i16_to_v4i16:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BW-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX512BW-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
|
||||
; AVX512BW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX512BW-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX512BW-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
|
||||
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
|
||||
; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v16i16_to_v4i16:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BWVL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512BWVL-NEXT: vpmovdw %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vpmovqw %ymm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
%vec = load <16 x i16>, <16 x i16>* %L
|
||||
@ -676,24 +594,19 @@ define void @trunc_v4i64_to_v4i16(<16 x i16>* %L, <4 x i16>* %S) nounwind {
|
||||
define void @shuffle_v32i8_to_v4i8(<32 x i8>* %L, <4 x i8>* %S) nounwind {
|
||||
; AVX1-LABEL: shuffle_v32i8_to_v4i8:
|
||||
; AVX1: # BB#0:
|
||||
; AVX1-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX1-NEXT: vmovaps (%rdi), %ymm0
|
||||
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
|
||||
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
||||
; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
|
||||
; AVX1-NEXT: vmovd %xmm0, (%rsi)
|
||||
; AVX1-NEXT: vzeroupper
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: shuffle_v32i8_to_v4i8:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
||||
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = mem[0,2,2,3,4,6,6,7]
|
||||
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
|
||||
; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
|
||||
; AVX2-NEXT: vmovd %xmm0, (%rsi)
|
||||
; AVX2-NEXT: vzeroupper
|
||||
; AVX2-NEXT: retq
|
||||
@ -701,11 +614,8 @@ define void @shuffle_v32i8_to_v4i8(<32 x i8>* %L, <4 x i8>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v32i8_to_v4i8:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
||||
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
|
||||
; AVX512F-NEXT: vmovd %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
@ -713,30 +623,23 @@ define void @shuffle_v32i8_to_v4i8(<32 x i8>* %L, <4 x i8>* %S) nounwind {
|
||||
; AVX512VL-LABEL: shuffle_v32i8_to_v4i8:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512VL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512VL-NEXT: vpmovdb %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vpmovqb %ymm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v32i8_to_v4i8:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
|
||||
; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0
|
||||
; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
|
||||
; AVX512BW-NEXT: vmovd %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v32i8_to_v4i8:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vextracti128 $1, %ymm0, %xmm1
|
||||
; AVX512BWVL-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; AVX512BWVL-NEXT: vpmovdb %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512BWVL-NEXT: vpmovqb %ymm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
%vec = load <32 x i8>, <32 x i8>* %L
|
||||
@ -802,3 +705,73 @@ define void @trunc_v4i64_to_v4i8(<32 x i8>* %L, <4 x i8>* %S) nounwind {
|
||||
store <4 x i8> %strided.vec, <4 x i8>* %S
|
||||
ret void
|
||||
}
|
||||
|
||||
; In this case not all elements are collected from the same source vector, so
|
||||
; the resulting BUILD_VECTOR should not be combined to a truncate.
|
||||
define <16 x i8> @negative(<32 x i8> %v, <32 x i8> %w) nounwind {
|
||||
; AVX1-LABEL: negative:
|
||||
; AVX1: # BB#0:
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[u,2,4,6,8,10,12,14],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
|
||||
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u],zero,zero,zero,zero,zero,zero,zero,xmm0[0,2,4,6,8,10,12,14]
|
||||
; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
|
||||
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; AVX1-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0
|
||||
; AVX1-NEXT: vzeroupper
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: negative:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,2,4,6,8,10,12,14,0,2,4,6,8,10,12,14,u,18,20,22,24,26,28,30,16,18,20,22,24,26,28,30]
|
||||
; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
|
||||
; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
|
||||
; AVX2-NEXT: vzeroupper
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512F-LABEL: negative:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,2,4,6,8,10,12,14,0,2,4,6,8,10,12,14,u,18,20,22,24,26,28,30,16,18,20,22,24,26,28,30]
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; AVX512F-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
|
||||
; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
|
||||
; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: negative:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,2,4,6,8,10,12,14,0,2,4,6,8,10,12,14,u,18,20,22,24,26,28,30,16,18,20,22,24,26,28,30]
|
||||
; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; AVX512VL-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
|
||||
; AVX512VL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
|
||||
; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: negative:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,2,4,6,8,10,12,14,0,2,4,6,8,10,12,14,u,18,20,22,24,26,28,30,16,18,20,22,24,26,28,30]
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
|
||||
; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
|
||||
; AVX512BW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
|
||||
; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: negative:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[u,2,4,6,8,10,12,14,0,2,4,6,8,10,12,14,u,18,20,22,24,26,28,30,16,18,20,22,24,26,28,30]
|
||||
; AVX512BWVL-NEXT: movl $65537, %eax # imm = 0x10001
|
||||
; AVX512BWVL-NEXT: kmovd %eax, %k1
|
||||
; AVX512BWVL-NEXT: vmovdqu8 %ymm1, %ymm0 {%k1}
|
||||
; AVX512BWVL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
|
||||
; AVX512BWVL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
%strided.vec = shufflevector <32 x i8> %v, <32 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
|
||||
%w0 = extractelement <32 x i8> %w, i32 0
|
||||
%merged = insertelement <16 x i8> %strided.vec, i8 %w0, i32 0
|
||||
ret <16 x i8> %merged
|
||||
}
|
||||
|
||||
@ -11,49 +11,37 @@
|
||||
define void @shuffle_v64i8_to_v32i8(<64 x i8>* %L, <32 x i8>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v64i8_to_v32i8:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512F-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30]
|
||||
; AVX512F-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30,u,u,u,u,u,u,u,u]
|
||||
; AVX512F-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
|
||||
; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512F-NEXT: vpmovsxwd (%rdi), %zmm0
|
||||
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
|
||||
; AVX512F-NEXT: vpmovsxwd 32(%rdi), %zmm1
|
||||
; AVX512F-NEXT: vpmovdb %zmm1, %xmm1
|
||||
; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
|
||||
; AVX512F-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v64i8_to_v32i8:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512VL-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30]
|
||||
; AVX512VL-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30,u,u,u,u,u,u,u,u]
|
||||
; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
|
||||
; AVX512VL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512VL-NEXT: vpmovsxwd (%rdi), %zmm0
|
||||
; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
|
||||
; AVX512VL-NEXT: vpmovsxwd 32(%rdi), %zmm1
|
||||
; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1
|
||||
; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
|
||||
; AVX512VL-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v64i8_to_v32i8:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm0
|
||||
; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm1
|
||||
; AVX512BW-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30]
|
||||
; AVX512BW-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30,u,u,u,u,u,u,u,u]
|
||||
; AVX512BW-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
|
||||
; AVX512BW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512BW-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm0
|
||||
; AVX512BW-NEXT: vpmovwb %zmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v64i8_to_v32i8:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu8 (%rdi), %zmm0
|
||||
; AVX512BWVL-NEXT: vextracti64x4 $1, %zmm0, %ymm1
|
||||
; AVX512BWVL-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,u,u,u,u,u,u,0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30]
|
||||
; AVX512BWVL-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u,16,18,20,22,24,26,28,30,u,u,u,u,u,u,u,u]
|
||||
; AVX512BWVL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3],ymm0[4,5],ymm1[6,7]
|
||||
; AVX512BWVL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512BWVL-NEXT: vmovdqu %ymm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vmovdqu16 (%rdi), %zmm0
|
||||
; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
%vec = load <64 x i8>, <64 x i8>* %L
|
||||
@ -106,54 +94,12 @@ define void @trunc_v32i16_to_v32i8(<64 x i8>* %L, <32 x i8>* %S) nounwind {
|
||||
}
|
||||
|
||||
define void @shuffle_v32i16_to_v16i16(<32 x i16>* %L, <16 x i16>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v32i16_to_v16i16:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} ymm0 = mem[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15]
|
||||
; AVX512F-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} ymm1 = mem[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15]
|
||||
; AVX512F-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15]
|
||||
; AVX512F-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
|
||||
; AVX512F-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512F-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v32i16_to_v16i16:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vpshuflw {{.*#+}} ymm0 = mem[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15]
|
||||
; AVX512VL-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15]
|
||||
; AVX512VL-NEXT: vpshuflw {{.*#+}} ymm1 = mem[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15]
|
||||
; AVX512VL-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15]
|
||||
; AVX512VL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[0,2],ymm1[4,6],ymm0[4,6]
|
||||
; AVX512VL-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512VL-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v32i16_to_v16i16:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm0
|
||||
; AVX512BW-NEXT: vextracti64x4 $1, %zmm0, %ymm1
|
||||
; AVX512BW-NEXT: vpshuflw {{.*#+}} ymm1 = ymm1[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15]
|
||||
; AVX512BW-NEXT: vpshufhw {{.*#+}} ymm1 = ymm1[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15]
|
||||
; AVX512BW-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[0,2,2,3,4,5,6,7,8,10,10,11,12,13,14,15]
|
||||
; AVX512BW-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,4,6,6,7,8,9,10,11,12,14,14,15]
|
||||
; AVX512BW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm1[0,2],ymm0[4,6],ymm1[4,6]
|
||||
; AVX512BW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512BW-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v32i16_to_v16i16:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu16 (%rdi), %zmm0
|
||||
; AVX512BWVL-NEXT: vextracti64x4 $1, %zmm0, %ymm1
|
||||
; AVX512BWVL-NEXT: vmovdqu {{.*#+}} ymm2 = [0,2,4,6,16,18,20,22,8,10,12,14,24,26,28,30]
|
||||
; AVX512BWVL-NEXT: vpermi2w %ymm1, %ymm0, %ymm2
|
||||
; AVX512BWVL-NEXT: vpermq {{.*#+}} ymm0 = ymm2[0,2,1,3]
|
||||
; AVX512BWVL-NEXT: vmovdqu %ymm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
; AVX512-LABEL: shuffle_v32i16_to_v16i16:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vmovdqa32 (%rdi), %zmm0
|
||||
; AVX512-NEXT: vpmovdw %zmm0, (%rsi)
|
||||
; AVX512-NEXT: vzeroupper
|
||||
; AVX512-NEXT: retq
|
||||
%vec = load <32 x i16>, <32 x i16>* %L
|
||||
%strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
|
||||
store <16 x i16> %strided.vec, <16 x i16>* %S
|
||||
@ -177,11 +123,8 @@ define void @trunc_v16i32_to_v16i16(<32 x i16>* %L, <16 x i16>* %S) nounwind {
|
||||
define void @shuffle_v16i32_to_v8i32(<16 x i32>* %L, <8 x i32>* %S) nounwind {
|
||||
; AVX512-LABEL: shuffle_v16i32_to_v8i32:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vmovdqa32 (%rdi), %zmm0
|
||||
; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
|
||||
; AVX512-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm1[0,2],ymm0[4,6],ymm1[4,6]
|
||||
; AVX512-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3]
|
||||
; AVX512-NEXT: vmovdqa %ymm0, (%rsi)
|
||||
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0
|
||||
; AVX512-NEXT: vpmovqd %zmm0, (%rsi)
|
||||
; AVX512-NEXT: vzeroupper
|
||||
; AVX512-NEXT: retq
|
||||
%vec = load <16 x i32>, <16 x i32>* %L
|
||||
@ -205,127 +148,12 @@ define void @trunc_v8i64_to_v8i32(<16 x i32>* %L, <8 x i32>* %S) nounwind {
|
||||
}
|
||||
|
||||
define void @shuffle_v64i8_to_v16i8(<64 x i8>* %L, <16 x i8>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v64i8_to_v16i8:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm1, %xmm1
|
||||
; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm2
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm0, %xmm0
|
||||
; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
|
||||
; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
|
||||
; AVX512F-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v64i8_to_v16i8:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm1, %xmm1
|
||||
; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm2
|
||||
; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm0, %xmm0
|
||||
; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
|
||||
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
|
||||
; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v64i8_to_v16i8:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm0
|
||||
; AVX512BW-NEXT: vpextrb $4, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm0, %ecx
|
||||
; AVX512BW-NEXT: vmovd %ecx, %xmm1
|
||||
; AVX512BW-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $12, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm2
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $4, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $12, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $4, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $12, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $4, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $12, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0
|
||||
; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v64i8_to_v16i8:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu8 (%rdi), %zmm0
|
||||
; AVX512BWVL-NEXT: vpextrb $4, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm0, %ecx
|
||||
; AVX512BWVL-NEXT: vmovd %ecx, %xmm1
|
||||
; AVX512BWVL-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $12, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $4, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $12, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $4, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $12, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $3, %zmm0, %xmm0
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $4, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $12, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0
|
||||
; AVX512BWVL-NEXT: vmovdqu %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
; AVX512-LABEL: shuffle_v64i8_to_v16i8:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vmovdqa32 (%rdi), %zmm0
|
||||
; AVX512-NEXT: vpmovdb %zmm0, (%rsi)
|
||||
; AVX512-NEXT: vzeroupper
|
||||
; AVX512-NEXT: retq
|
||||
%vec = load <64 x i8>, <64 x i8>* %L
|
||||
%strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60>
|
||||
store <16 x i8> %strided.vec, <16 x i8>* %S
|
||||
@ -347,99 +175,12 @@ define void @trunc_v16i32_to_v16i8(<64 x i8>* %L, <16 x i8>* %S) nounwind {
|
||||
}
|
||||
|
||||
define void @shuffle_v32i16_to_v8i16(<32 x i16>* %L, <8 x i16>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v32i16_to_v8i16:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512F-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
|
||||
; AVX512F-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
|
||||
; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm2
|
||||
; AVX512F-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
|
||||
; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX512F-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
|
||||
; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
|
||||
; AVX512F-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v32i16_to_v8i16:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
|
||||
; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
|
||||
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
|
||||
; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
|
||||
; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm2
|
||||
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
|
||||
; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
|
||||
; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
|
||||
; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
|
||||
; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
|
||||
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
|
||||
; AVX512VL-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v32i16_to_v8i16:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqu16 (%rdi), %zmm0
|
||||
; AVX512BW-NEXT: vxorps %xmm1, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vmovss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm2
|
||||
; AVX512BW-NEXT: vmovd %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2
|
||||
; AVX512BW-NEXT: vmovd %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm2, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm0
|
||||
; AVX512BW-NEXT: vmovd %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1
|
||||
; AVX512BW-NEXT: vpextrw $4, %xmm0, %eax
|
||||
; AVX512BW-NEXT: vpinsrw $7, %eax, %xmm1, %xmm0
|
||||
; AVX512BW-NEXT: vmovdqa %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v32i16_to_v8i16:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu16 (%rdi), %zmm0
|
||||
; AVX512BWVL-NEXT: vpxor %xmm1, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vmovss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
|
||||
; AVX512BWVL-NEXT: vpextrw $4, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $1, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
|
||||
; AVX512BWVL-NEXT: vmovd %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $2, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrw $4, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $3, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
|
||||
; AVX512BWVL-NEXT: vmovd %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $4, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrw $4, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $5, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $3, %zmm0, %xmm0
|
||||
; AVX512BWVL-NEXT: vmovd %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $6, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrw $4, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrw $7, %eax, %xmm1, %xmm0
|
||||
; AVX512BWVL-NEXT: vmovdqu %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
; AVX512-LABEL: shuffle_v32i16_to_v8i16:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0
|
||||
; AVX512-NEXT: vpmovqw %zmm0, (%rsi)
|
||||
; AVX512-NEXT: vzeroupper
|
||||
; AVX512-NEXT: retq
|
||||
%vec = load <32 x i16>, <32 x i16>* %L
|
||||
%strided.vec = shufflevector <32 x i16> %vec, <32 x i16> undef, <8 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28>
|
||||
store <8 x i16> %strided.vec, <8 x i16>* %S
|
||||
@ -461,95 +202,12 @@ define void @trunc_v8i64_to_v8i16(<32 x i16>* %L, <8 x i16>* %S) nounwind {
|
||||
}
|
||||
|
||||
define void @shuffle_v64i8_to_v8i8(<64 x i8>* %L, <8 x i8>* %S) nounwind {
|
||||
; AVX512F-LABEL: shuffle_v64i8_to_v8i8:
|
||||
; AVX512F: # BB#0:
|
||||
; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = <u,u,0,8,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm1, %xmm1
|
||||
; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
|
||||
; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm2
|
||||
; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512F-NEXT: vpshufb %xmm3, %xmm0, %xmm0
|
||||
; AVX512F-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
|
||||
; AVX512F-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
|
||||
; AVX512F-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512F-NEXT: vzeroupper
|
||||
; AVX512F-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: shuffle_v64i8_to_v8i8:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqa (%rdi), %ymm0
|
||||
; AVX512VL-NEXT: vmovdqa 32(%rdi), %ymm1
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm1, %xmm2
|
||||
; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = <u,u,0,8,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm1, %xmm1
|
||||
; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
|
||||
; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm2
|
||||
; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u>
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm2, %xmm2
|
||||
; AVX512VL-NEXT: vpshufb %xmm3, %xmm0, %xmm0
|
||||
; AVX512VL-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
|
||||
; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
|
||||
; AVX512VL-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512VL-NEXT: vzeroupper
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: shuffle_v64i8_to_v8i8:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqu8 (%rdi), %zmm0
|
||||
; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm1, %r8d
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm1, %r9d
|
||||
; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm1, %r10d
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm1, %r11d
|
||||
; AVX512BW-NEXT: vextracti32x4 $1, %zmm0, %xmm1
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm1, %eax
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm1, %ecx
|
||||
; AVX512BW-NEXT: vpextrb $8, %xmm0, %edx
|
||||
; AVX512BW-NEXT: vpextrb $0, %xmm0, %edi
|
||||
; AVX512BW-NEXT: vmovd %edi, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $1, %edx, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $4, %r11d, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $5, %r10d, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $6, %r9d, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vpinsrb $7, %r8d, %xmm0, %xmm0
|
||||
; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
|
||||
; AVX512BW-NEXT: vzeroupper
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512BWVL-LABEL: shuffle_v64i8_to_v8i8:
|
||||
; AVX512BWVL: # BB#0:
|
||||
; AVX512BWVL-NEXT: vmovdqu8 (%rdi), %zmm0
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm0, %ecx
|
||||
; AVX512BWVL-NEXT: vmovd %ecx, %xmm1
|
||||
; AVX512BWVL-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm2, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vextracti32x4 $3, %zmm0, %xmm0
|
||||
; AVX512BWVL-NEXT: vpextrb $0, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1
|
||||
; AVX512BWVL-NEXT: vpextrb $8, %xmm0, %eax
|
||||
; AVX512BWVL-NEXT: vpinsrb $14, %eax, %xmm1, %xmm0
|
||||
; AVX512BWVL-NEXT: vpmovwb %xmm0, (%rsi)
|
||||
; AVX512BWVL-NEXT: vzeroupper
|
||||
; AVX512BWVL-NEXT: retq
|
||||
; AVX512-LABEL: shuffle_v64i8_to_v8i8:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0
|
||||
; AVX512-NEXT: vpmovqb %zmm0, (%rsi)
|
||||
; AVX512-NEXT: vzeroupper
|
||||
; AVX512-NEXT: retq
|
||||
%vec = load <64 x i8>, <64 x i8>* %L
|
||||
%strided.vec = shufflevector <64 x i8> %vec, <64 x i8> undef, <8 x i32> <i32 0, i32 8, i32 16, i32 24, i32 32, i32 40, i32 48, i32 56>
|
||||
store <8 x i8> %strided.vec, <8 x i8>* %S
|
||||
|
||||
@ -11,14 +11,14 @@
|
||||
; preservation of the extend/truncate operations mentioned above (2 extend and
|
||||
; 3 truncate instructions).
|
||||
;
|
||||
; NOTE: This operation could be collapsed in to a single truncate. Once that is done
|
||||
; this test will have to be adjusted.
|
||||
; NOTE: This operation is collapsed to a single truncate, so this test no longer covers
|
||||
; what it originally intended to.
|
||||
|
||||
; CHECK: PUNPCKLBWrr
|
||||
; CHECK: PUNPCKLWDrr
|
||||
; CHECK: PACKUSWBrr
|
||||
; CHECK: MOVLHPSrr
|
||||
; CHECK: PSHUFHWri
|
||||
; CHECK: PACKUSWBrr
|
||||
; CHECK: PACKUSWBrr
|
||||
; CHECK: MOVPDI2DIrr
|
||||
|
||||
define void @test(double %vec.coerce) local_unnamed_addr {
|
||||
entry:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user