RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00
Code Issues Projects Releases Wiki Activity

Commute shufps / shufpd.

Browse Source 
llvm-svn: 28577
This commit is contained in:
Evan Cheng 2006-05-30 23:34:30 +00:00
parent 556edf9b9b
commit e2397256c1
2 changed files with 20 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
lib/Target/X86/X86InstrInfo.cpp
View File

@ -207,6 +207,24 @@ MachineInstr *X86InstrInfo::convertToThreeAddress(MachineInstr *MI) const {
///
MachineInstr *X86InstrInfo::commuteInstruction(MachineInstr *MI) const {
switch (MI->getOpcode()) {
case X86::SHUFPSrri: { // A = SHUFPSrri B,C, M -> A = SHUFPSrri C,B, rotl(M,4)
unsigned A = MI->getOperand(0).getReg();
unsigned B = MI->getOperand(1).getReg();
unsigned C = MI->getOperand(2).getReg();
unsigned M = MI->getOperand(3).getImmedValue();
if (B == C) return 0;
return BuildMI(X86::SHUFPSrri, 3, A).addReg(C).addReg(B).
addImm(((M & 0xF) << 4) | ((M & 0xF0) >> 4));
}
case X86::SHUFPDrri: { // A = SHUFPDrri B,C, M -> A = SHUFPDrri C,B, rotl(M,1)
unsigned A = MI->getOperand(0).getReg();
unsigned B = MI->getOperand(1).getReg();
unsigned C = MI->getOperand(2).getReg();
unsigned M = MI->getOperand(3).getImmedValue();
if (B == C) return 0;
return BuildMI(X86::SHUFPDrri, 3, A).addReg(C).addReg(B).
addImm(((M & 0x1) << 1) | ((M & 0x2) >> 1));
}
case X86::SHRD16rri8: // A = SHRD16rri8 B, C, I -> A = SHLD16rri8 C, B, (16-I)
case X86::SHLD16rri8: // A = SHLD16rri8 B, C, I -> A = SHRD16rri8 C, B, (16-I)
case X86::SHRD32rri8: // A = SHRD32rri8 B, C, I -> A = SHLD32rri8 C, B, (32-I)

3
lib/Target/X86/X86InstrSSE.td
View File

@ -1218,7 +1218,7 @@ def CMPPDrmi : PDIi8<0xC2, MRMSrcMem,
// Shuffle and unpack instructions
let isTwoAddress = 1 in {
let isConvertibleToThreeAddress = 1 in // Convert to pshufd
let isCommutable = 1, isConvertibleToThreeAddress = 1 in // Convert to pshufd
def SHUFPSrri : PSIi8<0xC6, MRMSrcReg,
(ops VR128:$dst, VR128:$src1, VR128:$src2, i32i8imm:$src3),
"shufps {$src3, $src2, $dst|$dst, $src2, $src3}",
@ -1231,6 +1231,7 @@ def SHUFPSrmi : PSIi8<0xC6, MRMSrcMem,
[(set VR128:$dst, (v4f32 (vector_shuffle
VR128:$src1, (load addr:$src2),
SHUFP_shuffle_mask:$src3)))]>;
let isCommutable = 1 in
def SHUFPDrri : PDIi8<0xC6, MRMSrcReg,
(ops VR128:$dst, VR128:$src1, VR128:$src2, i8imm:$src3),
"shufpd {$src3, $src2, $dst|$dst, $src2, $src3}",