From e28496e7a49a7f4cd8c5963de0ad94891396b168 Mon Sep 17 00:00:00 2001 From: Simon Dardis Date: Tue, 13 Dec 2016 11:10:53 +0000 Subject: [PATCH] [mips] Fix comment to respect 80 chars per line; NFC llvm-svn: 289530 --- lib/Target/Mips/MipsHazardSchedule.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/lib/Target/Mips/MipsHazardSchedule.cpp b/lib/Target/Mips/MipsHazardSchedule.cpp index 430b5fdf7c4..47f859cc0a8 100644 --- a/lib/Target/Mips/MipsHazardSchedule.cpp +++ b/lib/Target/Mips/MipsHazardSchedule.cpp @@ -7,10 +7,10 @@ // //===----------------------------------------------------------------------===// /// \file -/// This pass is used to workaround certain pipeline hazards. For now, this covers -/// compact branch hazards. In future this pass can be extended to other pipeline -/// hazards, such as various MIPS1 hazards, processor errata that require -/// instruction reorganization, etc. +/// This pass is used to workaround certain pipeline hazards. For now, this +/// covers compact branch hazards. In future this pass can be extended to other +/// pipeline hazards, such as various MIPS1 hazards, processor errata that +/// require instruction reorganization, etc. /// /// This pass has to run after the delay slot filler as that pass can introduce /// pipeline hazards, hence the existing hazard recognizer is not suitable. @@ -18,8 +18,8 @@ /// Hazards handled: forbidden slots for MIPSR6. /// /// A forbidden slot hazard occurs when a compact branch instruction is executed -/// and the adjacent instruction in memory is a control transfer instruction such -/// as a branch or jump, ERET, ERETNC, DERET, WAIT and PAUSE. +/// and the adjacent instruction in memory is a control transfer instruction +/// such as a branch or jump, ERET, ERETNC, DERET, WAIT and PAUSE. /// /// For example: ///