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Remove some special-case logic in ScheduleDAGSDNodes's
latency computation code that is no longer needed with the new method for handling latencies. llvm-svn: 61074
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@ -196,12 +196,6 @@ void ScheduleDAGSDNodes::ComputeLatency(SUnit *SU) {
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// Compute the latency for the node. We use the sum of the latencies for
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// all nodes flagged together into this SUnit.
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if (InstrItins.isEmpty()) {
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// No latency information.
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SU->Latency = 1;
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return;
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}
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SU->Latency = 0;
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bool SawMachineOpcode = false;
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for (SDNode *N = SU->getNode(); N; N = N->getFlaggedNode())
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@ -210,10 +204,6 @@ void ScheduleDAGSDNodes::ComputeLatency(SUnit *SU) {
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SU->Latency +=
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InstrItins.getLatency(TII->get(N->getMachineOpcode()).getSchedClass());
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}
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// Ensure that CopyToReg and similar nodes have a non-zero latency.
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if (!SawMachineOpcode)
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SU->Latency = 1;
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}
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/// CountResults - The results of target nodes have register or immediate
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