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[AArch64][SVE] Asm: Enable instructions to be prefixed.
This patch enables instructions that are destructive on their destination- and first source operand, to be prefixed with a MOVPRFX instruction. This patch also adds a variety of tests: - positive tests for all instructions and forms that accept a movprfx for either or both predicated and unpredicated forms. - negative tests for all instructions and forms that do not accept an unpredicated or predicated movprfx. - negative tests for the diagnostics that get emitted when a MOVPRFX instruction is used incorrectly. This is patch [2/2] in a series to add MOVPRFX instructions: - Patch [1/2]: https://reviews.llvm.org/D49592 - Patch [2/2]: https://reviews.llvm.org/D49593 Reviewers: rengolin, SjoerdMeijer, samparker, fhahn, javed.absar Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D49593 llvm-svn: 338261
This commit is contained in:
Sander de Smalen
parent
86dd4b2ca5
commit
e302c68dde
@ -892,40 +892,40 @@ let Predicates = [HasSVE] in {
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defm LSR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b001, "lsr">;
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defm LSL_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b011, "lsl">;
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def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16>;
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def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32>;
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def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16>;
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def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32>;
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def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32>;
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def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16>;
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def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16>;
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def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32>;
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def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16>;
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def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32>;
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def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16>;
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def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64>;
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def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32>;
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def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64>;
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def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64>;
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def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64>;
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def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16>;
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def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32>;
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def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16>;
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def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16>;
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def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32>;
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def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16>;
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def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64>;
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def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64>;
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def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32>;
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def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32>;
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def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64>;
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def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32>;
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def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64>;
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def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32>;
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def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64>;
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def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64>;
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def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64>;
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def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64>;
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def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16, ElementSizeS>;
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def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32, ElementSizeS>;
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def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16, ElementSizeH>;
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def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32, ElementSizeS>;
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def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32, ElementSizeS>;
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def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16, ElementSizeH>;
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def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16, ElementSizeH>;
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def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32, ElementSizeS>;
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def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16, ElementSizeH>;
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def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32, ElementSizeS>;
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def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16, ElementSizeD>;
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def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64, ElementSizeD>;
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def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32, ElementSizeD>;
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def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64, ElementSizeD>;
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def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64, ElementSizeD>;
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def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64, ElementSizeD>;
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def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16, ElementSizeS>;
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def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32, ElementSizeD>;
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def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16, ElementSizeS>;
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def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16, ElementSizeD>;
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def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32, ElementSizeD>;
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def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16, ElementSizeD>;
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def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64, ElementSizeD>;
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def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64, ElementSizeD>;
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def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32, ElementSizeD>;
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def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32, ElementSizeD>;
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def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64, ElementSizeD>;
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def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32, ElementSizeS>;
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def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64, ElementSizeD>;
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def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32, ElementSizeS>;
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def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64, ElementSizeD>;
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def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64, ElementSizeD>;
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def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64, ElementSizeD>;
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def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64, ElementSizeD>;
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defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn">;
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defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp">;
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@ -421,6 +421,8 @@ class sve_int_count_v<bits<2> sz8_64, bits<5> opc, string asm,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_int_count_v<bits<5> opc, string asm> {
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@ -506,6 +508,8 @@ class sve_int_countvlv<bits<5> opc, string asm, ZPRRegOp zprty>
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_int_countvlv<bits<5> opc, string asm, ZPRRegOp zprty> {
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@ -811,6 +815,8 @@ class sve_int_perm_insrs<bits<2> sz8_64, string asm, ZPRRegOp zprty,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_int_perm_insrs<string asm> {
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@ -835,6 +841,8 @@ class sve_int_perm_insrv<bits<2> sz8_64, string asm, ZPRRegOp zprty,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_int_perm_insrv<string asm> {
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@ -863,6 +871,8 @@ class sve_int_perm_extract_i<string asm>
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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//===----------------------------------------------------------------------===//
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@ -956,6 +966,8 @@ class sve_int_log_imm<bits<2> opc, string asm>
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let Constraints = "$Zdn = $_Zdn";
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let DecoderMethod = "DecodeSVELogicalImmInstruction";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_int_log_imm<bits<2> opc, string asm, string alias> {
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@ -1066,6 +1078,8 @@ class sve_fp_2op_i_p_zds<bits<2> sz, bits<3> opc, string asm,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_fp_2op_i_p_zds<bits<3> opc, string asm, Operand imm_ty> {
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@ -1093,6 +1107,8 @@ class sve_fp_2op_p_zds<bits<2> sz, bits<4> opc, string asm,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_fp_2op_p_zds<bits<4> opc, string asm> {
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@ -1118,6 +1134,8 @@ class sve_fp_ftmad<bits<2> sz, string asm, ZPRRegOp zprty>
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_fp_ftmad<string asm> {
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@ -1179,6 +1197,8 @@ class sve_fp_3op_p_zds_a<bits<2> sz, bits<2> opc, string asm, ZPRRegOp zprty>
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let Inst{4-0} = Zda;
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let Constraints = "$Zda = $_Zda";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_fp_3op_p_zds_a<bits<2> opc, string asm> {
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@ -1208,6 +1228,8 @@ class sve_fp_3op_p_zds_b<bits<2> sz, bits<2> opc, string asm,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_fp_3op_p_zds_b<bits<2> opc, string asm> {
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@ -1236,6 +1258,8 @@ class sve_fp_fma_by_indexed_elem<bits<2> sz, bit opc, string asm,
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let Inst{4-0} = Zda;
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let Constraints = "$Zda = $_Zda";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_fp_fma_by_indexed_elem<bit opc, string asm> {
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@ -1326,6 +1350,8 @@ class sve_fp_fcmla<bits<2> sz, string asm, ZPRRegOp zprty>
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let Inst{4-0} = Zda;
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let Constraints = "$Zda = $_Zda";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_fp_fcmla<string asm> {
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@ -1357,6 +1383,8 @@ class sve_fp_fcmla_by_indexed_elem<bits<2> sz, string asm,
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let Inst{4-0} = Zda;
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let Constraints = "$Zda = $_Zda";
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let DestructiveInstType = Destructive;
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let ElementSize = ElementSizeNone;
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}
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multiclass sve_fp_fcmla_by_indexed_elem<string asm> {
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@ -1398,6 +1426,8 @@ class sve_fp_fcadd<bits<2> sz, string asm, ZPRRegOp zprty>
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_fp_fcadd<string asm> {
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@ -1478,7 +1508,7 @@ multiclass sve_int_perm_bin_perm_zz<bits<3> opc, string asm> {
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//===----------------------------------------------------------------------===//
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class sve_fp_2op_p_zd<bits<7> opc, string asm, RegisterOperand i_zprtype,
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RegisterOperand o_zprtype>
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RegisterOperand o_zprtype, ElementSizeEnum size>
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: I<(outs o_zprtype:$Zd), (ins i_zprtype:$_Zd, PPR3bAny:$Pg, i_zprtype:$Zn),
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asm, "\t$Zd, $Pg/m, $Zn",
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"",
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@ -1496,12 +1526,14 @@ class sve_fp_2op_p_zd<bits<7> opc, string asm, RegisterOperand i_zprtype,
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let Inst{4-0} = Zd;
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let Constraints = "$Zd = $_Zd";
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let DestructiveInstType = Destructive;
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let ElementSize = size;
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}
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multiclass sve_fp_2op_p_zd_HSD<bits<5> opc, string asm> {
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def _H : sve_fp_2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16>;
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def _S : sve_fp_2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32>;
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def _D : sve_fp_2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64>;
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def _H : sve_fp_2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16, ElementSizeH>;
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def _S : sve_fp_2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32, ElementSizeS>;
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def _D : sve_fp_2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64, ElementSizeD>;
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}
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//===----------------------------------------------------------------------===//
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@ -1553,6 +1585,8 @@ class sve_int_bin_pred_arit_log<bits<2> sz8_64, bits<2> fmt, bits<3> opc,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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let ElementSize = zprty.ElementSize;
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}
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multiclass sve_int_bin_pred_log<bits<3> opc, string asm> {
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@ -1614,6 +1648,8 @@ class sve_int_mladdsub_vvv_pred<bits<2> sz8_64, bits<1> opc, string asm,
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let Inst{4-0} = Zdn;
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let Constraints = "$Zdn = $_Zdn";
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let DestructiveInstType = Destructive;
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||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_mladdsub_vvv_pred<bits<1> opc, string asm> {
|
||||
@ -1644,6 +1680,8 @@ class sve_int_mlas_vvv_pred<bits<2> sz8_64, bits<1> opc, string asm,
|
||||
let Inst{4-0} = Zda;
|
||||
|
||||
let Constraints = "$Zda = $_Zda";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_mlas_vvv_pred<bits<1> opc, string asm> {
|
||||
@ -1674,6 +1712,8 @@ class sve_intx_dot<bit sz, bit U, string asm, ZPRRegOp zprty1,
|
||||
let Inst{4-0} = Zda;
|
||||
|
||||
let Constraints = "$Zda = $_Zda";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty1.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_intx_dot<bit opc, string asm> {
|
||||
@ -1702,6 +1742,8 @@ class sve_intx_dot_by_indexed_elem<bit sz, bit U, string asm,
|
||||
let Inst{4-0} = Zda;
|
||||
|
||||
let Constraints = "$Zda = $_Zda";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = ElementSizeNone;
|
||||
}
|
||||
|
||||
multiclass sve_intx_dot_by_indexed_elem<bit opc, string asm> {
|
||||
@ -1743,6 +1785,8 @@ class sve_int_un_pred_arit<bits<2> sz8_64, bits<4> opc,
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let Constraints = "$Zd = $_Zd";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_un_pred_arit_0<bits<3> opc, string asm> {
|
||||
@ -1873,6 +1917,8 @@ class sve_int_arith_imm0<bits<2> sz8_64, bits<3> opc, string asm,
|
||||
let Inst{4-0} = Zdn;
|
||||
|
||||
let Constraints = "$Zdn = $_Zdn";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = ElementSizeNone;
|
||||
}
|
||||
|
||||
multiclass sve_int_arith_imm0<bits<3> opc, string asm> {
|
||||
@ -1898,6 +1944,8 @@ class sve_int_arith_imm<bits<2> sz8_64, bits<6> opc, string asm,
|
||||
let Inst{4-0} = Zdn;
|
||||
|
||||
let Constraints = "$Zdn = $_Zdn";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = ElementSizeNone;
|
||||
}
|
||||
|
||||
multiclass sve_int_arith_imm1<bits<2> opc, string asm, Operand immtype> {
|
||||
@ -1958,6 +2006,8 @@ class sve_int_dup_fpimm_pred<bits<2> sz, Operand fpimmtype,
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let Constraints = "$Zd = $_Zd";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_dup_fpimm_pred<string asm> {
|
||||
@ -1990,6 +2040,9 @@ class sve_int_dup_imm_pred<bits<2> sz8_64, bit m, string asm,
|
||||
let Inst{13} = imm{8}; // sh
|
||||
let Inst{12-5} = imm{7-0}; // imm8
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_dup_imm_pred_merge<string asm> {
|
||||
@ -2444,9 +2497,9 @@ multiclass sve_int_index_rr<string asm> {
|
||||
//===----------------------------------------------------------------------===//
|
||||
// SVE Bitwise Shift - Predicated Group
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
class sve_int_bin_pred_shift_imm<bits<4> tsz8_64, bits<3> opc, string asm,
|
||||
ZPRRegOp zprty, Operand immtype>
|
||||
ZPRRegOp zprty, Operand immtype,
|
||||
ElementSizeEnum size>
|
||||
: I<(outs zprty:$Zdn), (ins PPR3bAny:$Pg, zprty:$_Zdn, immtype:$imm),
|
||||
asm, "\t$Zdn, $Pg/m, $_Zdn, $imm",
|
||||
"",
|
||||
@ -2465,31 +2518,41 @@ class sve_int_bin_pred_shift_imm<bits<4> tsz8_64, bits<3> opc, string asm,
|
||||
let Inst{4-0} = Zdn;
|
||||
|
||||
let Constraints = "$Zdn = $_Zdn";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = size;
|
||||
}
|
||||
|
||||
multiclass sve_int_bin_pred_shift_imm_left<bits<3> opc, string asm> {
|
||||
def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftL8>;
|
||||
def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftL16> {
|
||||
def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftL8,
|
||||
ElementSizeB>;
|
||||
def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftL16,
|
||||
ElementSizeH> {
|
||||
let Inst{8} = imm{3};
|
||||
}
|
||||
def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftL32> {
|
||||
def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftL32,
|
||||
ElementSizeS> {
|
||||
let Inst{9-8} = imm{4-3};
|
||||
}
|
||||
def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftL64> {
|
||||
def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftL64,
|
||||
ElementSizeD> {
|
||||
let Inst{22} = imm{5};
|
||||
let Inst{9-8} = imm{4-3};
|
||||
}
|
||||
}
|
||||
|
||||
multiclass sve_int_bin_pred_shift_imm_right<bits<3> opc, string asm> {
|
||||
def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftR8>;
|
||||
def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftR16> {
|
||||
def _B : sve_int_bin_pred_shift_imm<{0,0,0,1}, opc, asm, ZPR8, vecshiftR8,
|
||||
ElementSizeB>;
|
||||
def _H : sve_int_bin_pred_shift_imm<{0,0,1,?}, opc, asm, ZPR16, vecshiftR16,
|
||||
ElementSizeH> {
|
||||
let Inst{8} = imm{3};
|
||||
}
|
||||
def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftR32> {
|
||||
def _S : sve_int_bin_pred_shift_imm<{0,1,?,?}, opc, asm, ZPR32, vecshiftR32,
|
||||
ElementSizeS> {
|
||||
let Inst{9-8} = imm{4-3};
|
||||
}
|
||||
def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftR64> {
|
||||
def _D : sve_int_bin_pred_shift_imm<{1,?,?,?}, opc, asm, ZPR64, vecshiftR64,
|
||||
ElementSizeD> {
|
||||
let Inst{22} = imm{5};
|
||||
let Inst{9-8} = imm{4-3};
|
||||
}
|
||||
@ -2515,6 +2578,8 @@ class sve_int_bin_pred_shift<bits<2> sz8_64, bit wide, bits<3> opc,
|
||||
let Inst{4-0} = Zdn;
|
||||
|
||||
let Constraints = "$Zdn = $_Zdn";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_bin_pred_shift<bits<3> opc, string asm> {
|
||||
@ -3149,6 +3214,8 @@ class sve_int_perm_clast_zz<bits<2> sz8_64, bit ab, string asm,
|
||||
let Inst{4-0} = Zdn;
|
||||
|
||||
let Constraints = "$Zdn = $_Zdn";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = ElementSizeNone;
|
||||
}
|
||||
|
||||
multiclass sve_int_perm_clast_zz<bit ab, string asm> {
|
||||
@ -3226,6 +3293,8 @@ class sve_int_perm_splice<bits<2> sz8_64, string asm, ZPRRegOp zprty>
|
||||
let Inst{4-0} = Zdn;
|
||||
|
||||
let Constraints = "$Zdn = $_Zdn";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = ElementSizeNone;
|
||||
}
|
||||
|
||||
multiclass sve_int_perm_splice<string asm> {
|
||||
@ -3254,6 +3323,8 @@ class sve_int_perm_rev<bits<2> sz8_64, bits<2> opc, string asm,
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let Constraints = "$Zd = $_Zd";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_perm_rev_rbit<string asm> {
|
||||
@ -3295,6 +3366,8 @@ class sve_int_perm_cpy_r<bits<2> sz8_64, string asm, ZPRRegOp zprty,
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let Constraints = "$Zd = $_Zd";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_perm_cpy_r<string asm> {
|
||||
@ -3330,6 +3403,8 @@ class sve_int_perm_cpy_v<bits<2> sz8_64, string asm, ZPRRegOp zprty,
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let Constraints = "$Zd = $_Zd";
|
||||
let DestructiveInstType = Destructive;
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_perm_cpy_v<string asm> {
|
||||
@ -4267,6 +4342,8 @@ class sve_int_movprfx_pred<bits<2> sz8_32, bits<3> opc, string asm,
|
||||
let Inst{12-10} = Pg;
|
||||
let Inst{9-5} = Zn;
|
||||
let Inst{4-0} = Zd;
|
||||
|
||||
let ElementSize = zprty.ElementSize;
|
||||
}
|
||||
|
||||
multiclass sve_int_movprfx_pred_merge<bits<3> opc, string asm> {
|
||||
|
||||
@ -54,3 +54,31 @@ abs z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xd6,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf d6 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
abs z4.d, p7/m, z31.d
|
||||
// CHECK-INST: abs z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xd6,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf d6 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
abs z4.d, p7/m, z31.d
|
||||
// CHECK-INST: abs z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xd6,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf d6 04 <unknown>
|
||||
|
||||
@ -144,3 +144,25 @@ add z0.d, z0.d, #65536
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255] or a multiple of 256 in range [256, 65280]
|
||||
// CHECK-NEXT: add z0.d, z0.d, #65536
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p0/z, z6.d
|
||||
add z31.d, z31.d, #65280
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: add z31.d, z31.d, #65280
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z23.s, p0/z, z30.s
|
||||
add z23.s, z13.s, z8.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: add z23.s, z13.s, z8.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z23, z30
|
||||
add z23.s, z13.s, z8.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: add z23.s, z13.s, z8.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -283,3 +283,43 @@ add z31.d, z31.d, #65280
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff ff e0 25 <unknown>
|
||||
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.b, p7/z, z6.b
|
||||
// CHECK-INST: movprfx z4.b, p7/z, z6.b
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c 10 04 <unknown>
|
||||
|
||||
add z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-INST: add z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0x00,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f 00 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
add z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-INST: add z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0x00,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f 00 04 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
add z31.d, z31.d, #65280
|
||||
// CHECK-INST: add z31.d, z31.d, #65280
|
||||
// CHECK-ENCODING: [0xff,0xff,0xe0,0x25]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff ff e0 25 <unknown>
|
||||
|
||||
@ -57,3 +57,19 @@ adr z0.d, [z0.d, z0.d, sxtw #4]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #3'
|
||||
// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #4]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
adr z0.d, [z0.d, z0.d, sxtw #3]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #3]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
adr z0.d, [z0.d, z0.d, sxtw #3]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: adr z0.d, [z0.d, z0.d, sxtw #3]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -92,3 +92,25 @@ and p0.b, p0/m, p1.b, p2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: and p0.b, p0/m, p1.b, p2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
and z0.d, z0.d, #0x6
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: and z0.d, z0.d, #0x6
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z23.d, p0/z, z30.d
|
||||
and z23.d, z13.d, z8.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: and z23.d, z13.d, z8.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z23, z30
|
||||
and z23.d, z13.d, z8.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: and z23.d, z13.d, z8.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -108,3 +108,43 @@ and p15.b, p15/z, p15.b, p15.b
|
||||
// CHECK-ENCODING: [0xef,0x7d,0x0f,0x25]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ef 7d 0f 25 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
and z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-INST: and z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0xda,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f da 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
and z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-INST: and z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0xda,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f da 04 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
and z0.d, z0.d, #0x6
|
||||
// CHECK-INST: and z0.d, z0.d, #0x6
|
||||
// CHECK-ENCODING: [0x20,0xf8,0x83,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 f8 83 05 <unknown>
|
||||
|
||||
@ -31,4 +31,19 @@ andv v0.2d, p7, z31.d
|
||||
andv h0, p8, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
|
||||
// CHECK-NEXT: andv h0, p8, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
andv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: andv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
andv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: andv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -122,3 +122,31 @@ asr z0.b, p8/m, z0.b, z1.b
|
||||
// CHECK-NEXT: asr z0.b, p8/m, z0.b, z1.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p0/z, z6.d
|
||||
asr z31.d, z31.d, #64
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: asr z31.d, z31.d, #64
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
asr z31.d, z31.d, #64
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: asr z31.d, z31.d, #64
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
asr z0.s, z1.s, z2.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: asr z0.s, z1.s, z2.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
asr z0.s, z1.s, z2.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: asr z0.s, z1.s, z2.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -162,3 +162,55 @@ asr z0.s, z1.s, z2.d
|
||||
// CHECK-ENCODING: [0x20,0x80,0xa2,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 80 a2 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p0/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p0/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 20 d0 04 <unknown>
|
||||
|
||||
asr z31.d, p0/m, z31.d, #64
|
||||
// CHECK-INST: asr z31.d, p0/m, z31.d, #64
|
||||
// CHECK-ENCODING: [0x1f,0x80,0x80,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 80 80 04 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
asr z31.d, p0/m, z31.d, #64
|
||||
// CHECK-INST: asr z31.d, p0/m, z31.d, #64
|
||||
// CHECK-ENCODING: [0x1f,0x80,0x80,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 80 80 04 <unknown>
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
// CHECK-INST: movprfx z0.s, p0/z, z7.s
|
||||
// CHECK-ENCODING: [0xe0,0x20,0x90,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 20 90 04 <unknown>
|
||||
|
||||
asr z0.s, p0/m, z0.s, z1.d
|
||||
// CHECK-INST: asr z0.s, p0/m, z0.s, z1.d
|
||||
// CHECK-ENCODING: [0x20,0x80,0x98,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 80 98 04 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
asr z0.s, p0/m, z0.s, z1.d
|
||||
// CHECK-INST: asr z0.s, p0/m, z0.s, z1.d
|
||||
// CHECK-ENCODING: [0x20,0x80,0x98,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 80 98 04 <unknown>
|
||||
|
||||
@ -54,3 +54,31 @@ asrd z31.d, p0/m, z31.d, #64
|
||||
// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p0/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p0/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 20 d0 04 <unknown>
|
||||
|
||||
asrd z31.d, p0/m, z31.d, #64
|
||||
// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
|
||||
// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
asrd z31.d, p0/m, z31.d, #64
|
||||
// CHECK-INST: asrd z31.d, p0/m, z31.d, #64
|
||||
// CHECK-ENCODING: [0x1f,0x80,0x84,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 80 84 04 <unknown>
|
||||
|
||||
@ -30,3 +30,31 @@ asrr z0.d, p0/m, z0.d, z0.d
|
||||
// CHECK-ENCODING: [0x00,0x80,0xd4,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 80 d4 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
|
||||
|
||||
asrr z5.d, p0/m, z5.d, z0.d
|
||||
// CHECK-INST: asrr z5.d, p0/m, z5.d, z0.d
|
||||
// CHECK-ENCODING: [0x05,0x80,0xd4,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 80 d4 04 <unknown>
|
||||
|
||||
movprfx z5, z7
|
||||
// CHECK-INST: movprfx z5, z7
|
||||
// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
|
||||
|
||||
asrr z5.d, p0/m, z5.d, z0.d
|
||||
// CHECK-INST: asrr z5.d, p0/m, z5.d, z0.d
|
||||
// CHECK-ENCODING: [0x05,0x80,0xd4,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 80 d4 04 <unknown>
|
||||
|
||||
@ -92,3 +92,25 @@ bic p0.b, p0/m, p1.b, p2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: bic p0.b, p0/m, p1.b, p2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
bic z0.d, z0.d, #0x6
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: bic z0.d, z0.d, #0x6
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z23.d, p0/z, z30.d
|
||||
bic z23.d, z13.d, z8.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: bic z23.d, z13.d, z8.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z23, z30
|
||||
bic z23.d, z13.d, z8.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: bic z23.d, z13.d, z8.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -102,3 +102,43 @@ bic p0.b, p0/z, p0.b, p0.b
|
||||
// CHECK-ENCODING: [0x10,0x40,0x00,0x25]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 10 40 00 25 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
bic z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-INST: bic z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0xdb,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f db 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
bic z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-INST: bic z4.d, p7/m, z4.d, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0xdb,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f db 04 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
bic z0.d, z0.d, #0x6
|
||||
// CHECK-INST: and z0.d, z0.d, #0xfffffffffffffff9
|
||||
// CHECK-ENCODING: [0xa0,0xef,0x83,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 ef 83 05 <unknown>
|
||||
|
||||
@ -77,3 +77,37 @@ clasta z0.d, p7, z0.d, z31.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: clasta z0.d, p7, z0.d, z31.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
clasta x0, p7, x0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clasta x0, p7, x0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
clasta x0, p7, x0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clasta x0, p7, x0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
clasta d0, p7, d0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clasta d0, p7, d0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
clasta d0, p7, d0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clasta d0, p7, d0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
clasta z0.d, p7, z0.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: clasta z0.d, p7, z0.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -78,3 +78,19 @@ clasta z0.d, p7, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xe8,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f e8 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
clasta z0.d, p7, z0.d, z31.d
|
||||
// CHECK-INST: clasta z0.d, p7, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xe8,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f e8 05 <unknown>
|
||||
|
||||
@ -77,3 +77,37 @@ clastb z0.d, p7, z0.d, z31.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: clastb z0.d, p7, z0.d, z31.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
clastb x0, p7, x0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clastb x0, p7, x0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
clastb x0, p7, x0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clastb x0, p7, x0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
clastb d0, p7, d0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clastb d0, p7, d0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
clastb d0, p7, d0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: clastb d0, p7, d0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
clastb z0.d, p7, z0.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: clastb z0.d, p7, z0.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -78,3 +78,19 @@ clastb z0.d, p7, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xe9,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f e9 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
clastb z0.d, p7, z0.d, z31.d
|
||||
// CHECK-INST: clastb z0.d, p7, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xe9,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f e9 05 <unknown>
|
||||
|
||||
@ -30,3 +30,31 @@ cls z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xd8,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf d8 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
cls z4.d, p7/m, z31.d
|
||||
// CHECK-INST: cls z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xd8,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf d8 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
cls z4.d, p7/m, z31.d
|
||||
// CHECK-INST: cls z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xd8,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf d8 04 <unknown>
|
||||
|
||||
@ -30,3 +30,31 @@ clz z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xd9,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf d9 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
clz z4.d, p7/m, z31.d
|
||||
// CHECK-INST: clz z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xd9,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf d9 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
clz z4.d, p7/m, z31.d
|
||||
// CHECK-INST: clz z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xd9,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf d9 04 <unknown>
|
||||
|
||||
@ -74,3 +74,31 @@ cmpeq p0.s, p0/z, z0.s, #16
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
|
||||
// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, #16
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmpeq p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpeq p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpeq p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmpeq p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpeq p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpeq p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmpge p0.s, p0/z, z0.s, #16
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
|
||||
// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, #16
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmpge p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpge p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpge p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpge p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmpge p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpge p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpge p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmpgt p0.s, p0/z, z0.s, #16
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
|
||||
// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, #16
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmpgt p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpgt p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpgt p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpgt p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmpgt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpgt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpgt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmphi p0.s, p0/z, z0.s, #128
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
|
||||
// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, #128
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmphi p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphi p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmphi p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphi p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmphi p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmphi p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphi p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmphs p0.s, p0/z, z0.s, #128
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
|
||||
// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, #128
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmphs p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphs p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmphs p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphs p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmphs p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmphs p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmphs p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmple p0.s, p0/z, z0.s, #16
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
|
||||
// CHECK-NEXT: cmple p0.s, p0/z, z0.s, #16
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmple p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmple p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmple p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmple p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmple p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmple p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmple p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmple p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmplo p0.s, p0/z, z0.s, #128
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
|
||||
// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, #128
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmplo p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplo p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmplo p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplo p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmplo p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmplo p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplo p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmpls p0.s, p0/z, z0.s, #128
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 127].
|
||||
// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, #128
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmpls p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpls p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpls p0.d, p0/z, z0.d, #127
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpls p0.d, p0/z, z0.d, #127
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmpls p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpls p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpls p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmplt p0.s, p0/z, z0.s, #16
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
|
||||
// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, #16
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmplt p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplt p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmplt p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplt p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmplt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmplt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmplt p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -74,3 +74,31 @@ cmpne p0.s, p0/z, z0.s, #16
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-16, 15].
|
||||
// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, #16
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
cmpne p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpne p0.d, p0/z, z0.d, #15
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpne p0.d, p0/z, z0.d, #15
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.s, p0/z, z7.s
|
||||
cmpne p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
cmpne p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: cmpne p0.s, p0/z, z0.s, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -30,3 +30,31 @@ cnot z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xdb,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf db 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
cnot z4.d, p7/m, z31.d
|
||||
// CHECK-INST: cnot z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xdb,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf db 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
cnot z4.d, p7/m, z31.d
|
||||
// CHECK-INST: cnot z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xdb,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf db 04 <unknown>
|
||||
|
||||
@ -30,3 +30,31 @@ cnt z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xda,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf da 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
cnt z4.d, p7/m, z31.d
|
||||
// CHECK-INST: cnt z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xda,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf da 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
cnt z4.d, p7/m, z31.d
|
||||
// CHECK-INST: cnt z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xda,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf da 04 <unknown>
|
||||
|
||||
@ -26,3 +26,19 @@ compact z31.h, p7, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: compact z31.h, p7, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
compact z31.d, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: compact z31.d, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
compact z31.d, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: compact z31.d, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -275,3 +275,79 @@ cpy z21.d, p15/m, #-128, lsl #8
|
||||
// CHECK-ENCODING: [0x15,0x70,0xdf,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 15 70 df 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 3c d0 04 <unknown>
|
||||
|
||||
cpy z31.d, p7/m, sp
|
||||
// CHECK-INST: mov z31.d, p7/m, sp
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf e8 05 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
cpy z31.d, p7/m, sp
|
||||
// CHECK-INST: mov z31.d, p7/m, sp
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xe8,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf e8 05 <unknown>
|
||||
|
||||
movprfx z21.d, p7/z, z28.d
|
||||
// CHECK-INST: movprfx z21.d, p7/z, z28.d
|
||||
// CHECK-ENCODING: [0x95,0x3f,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 3f d0 04 <unknown>
|
||||
|
||||
cpy z21.d, p7/m, #-128, lsl #8
|
||||
// CHECK-INST: mov z21.d, p7/m, #-32768
|
||||
// CHECK-ENCODING: [0x15,0x70,0xd7,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 15 70 d7 05 <unknown>
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
cpy z21.d, p15/m, #-128, lsl #8
|
||||
// CHECK-INST: mov z21.d, p15/m, #-32768
|
||||
// CHECK-ENCODING: [0x15,0x70,0xdf,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 15 70 df 05 <unknown>
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
cpy z4.d, p7/m, d31
|
||||
// CHECK-INST: mov z4.d, p7/m, d31
|
||||
// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 9f e0 05 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
cpy z4.d, p7/m, d31
|
||||
// CHECK-INST: mov z4.d, p7/m, d31
|
||||
// CHECK-ENCODING: [0xe4,0x9f,0xe0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 9f e0 05 <unknown>
|
||||
|
||||
@ -36,3 +36,13 @@ decp x0, p0.q
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
|
||||
// CHECK-NEXT: decp x0, p0.q
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
decp z31.d, p7
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: decp z31.d, p7
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -72,3 +72,19 @@ decp z31.d, p15
|
||||
// CHECK-ENCODING: [0xff,0x81,0xed,0x25]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff 81 ed 25 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
decp z31.d, p15
|
||||
// CHECK-INST: decp z31.d, p15
|
||||
// CHECK-ENCODING: [0xff,0x81,0xed,0x25]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff 81 ed 25 <unknown>
|
||||
|
||||
@ -215,3 +215,43 @@ dup z24.q, z21.q[4]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
|
||||
// CHECK-NEXT: dup z24.q, z21.q[4]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.b, p0/z, z6.b
|
||||
dup z31.b, wsp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dup z31.b, wsp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
dup z31.b, wsp
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dup z31.b, wsp
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z21.d, p0/z, z28.d
|
||||
dup z21.d, #32512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dup z21.d, #32512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z21, z28
|
||||
dup z21.d, #32512
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dup z21.d, #32512
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31.d, p0/z, z6.d
|
||||
dup z31.d, z31.d[7]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dup z31.d, z31.d[7]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
dup z31.d, z31.d[7]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dup z31.d, z31.d[7]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -37,3 +37,19 @@ dupm z15.d, #0xfffffffffffffffa
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or logical immediate
|
||||
// CHECK-NEXT: dupm z15.d, #0xfffffffffffffffa
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
dupm z0.d, #0xfffffffffffffff9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dupm z0.d, #0xfffffffffffffff9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
dupm z0.d, #0xfffffffffffffff9
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: dupm z0.d, #0xfffffffffffffff9
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -50,3 +50,13 @@ eon z7.d, z8.d, #254
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
|
||||
// CHECK-NEXT: eon z7.d, z8.d, #254
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
eon z0.d, z0.d, #0x6
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: eon z0.d, z0.d, #0x6
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -54,3 +54,19 @@ eon z0.d, z0.d, #0x6
|
||||
// CHECK-ENCODING: [0xa0,0xef,0x43,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 ef 43 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
eon z0.d, z0.d, #0x6
|
||||
// CHECK-INST: eor z0.d, z0.d, #0xfffffffffffffff9
|
||||
// CHECK-ENCODING: [0xa0,0xef,0x43,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: a0 ef 43 05 <unknown>
|
||||
|
||||
@ -92,3 +92,25 @@ eor p0.b, p0/m, p1.b, p2.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: eor p0.b, p0/m, p1.b, p2.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
eor z0.d, z0.d, #0x6
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: eor z0.d, z0.d, #0x6
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
eor z0.d, z0.d, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: eor z0.d, z0.d, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
eor z0.d, z0.d, z0.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: eor z0.d, z0.d, z0.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -108,3 +108,43 @@ eor p15.b, p15/z, p15.b, p15.b
|
||||
// CHECK-ENCODING: [0xef,0x7f,0x0f,0x25]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ef 7f 0f 25 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.b, p7/z, z6.b
|
||||
// CHECK-INST: movprfx z4.b, p7/z, z6.b
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0x10,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c 10 04 <unknown>
|
||||
|
||||
eor z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f 19 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
eor z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-INST: eor z4.b, p7/m, z4.b, z31.b
|
||||
// CHECK-ENCODING: [0xe4,0x1f,0x19,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 1f 19 04 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
eor z0.d, z0.d, #0x6
|
||||
// CHECK-INST: eor z0.d, z0.d, #0x6
|
||||
// CHECK-ENCODING: [0x20,0xf8,0x43,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 f8 43 05 <unknown>
|
||||
|
||||
@ -31,4 +31,19 @@ eorv v0.2d, p7, z31.d
|
||||
eorv h0, p8, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
|
||||
// CHECK-NEXT: eorv h0, p8, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
eorv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: eorv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
eorv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: eorv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -31,3 +31,13 @@ ext z0.b, z0.b, z1.b, #256
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 255].
|
||||
// CHECK-NEXT: ext z0.b, z0.b, z1.b, #256
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.b, p0/z, z6.b
|
||||
ext z31.b, z31.b, z0.b, #255
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: ext z31.b, z31.b, z0.b, #255
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -18,3 +18,19 @@ ext z31.b, z31.b, z0.b, #255
|
||||
// CHECK-ENCODING: [0x1f,0x1c,0x3f,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 1c 3f 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
ext z31.b, z31.b, z0.b, #255
|
||||
// CHECK-INST: ext z31.b, z31.b, z0.b, #255
|
||||
// CHECK-ENCODING: [0x1f,0x1c,0x3f,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 1f 1c 3f 05 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fabd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c8 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fabd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fabd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c8 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fabd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fabd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc8,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c8 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fabs z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xdc,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf dc 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
fabs z4.d, p7/m, z31.d
|
||||
// CHECK-INST: fabs z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf dc 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
fabs z4.d, p7/m, z31.d
|
||||
// CHECK-INST: fabs z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf dc 04 <unknown>
|
||||
|
||||
@ -9,3 +9,19 @@ facge p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
|
||||
// CHECK-NEXT: facge p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
facge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: facge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
facge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: facge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,19 @@ facgt p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
|
||||
// CHECK-NEXT: facgt p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
facgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: facgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
facgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: facgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,19 @@ facle p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
|
||||
// CHECK-NEXT: facle p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
facle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: facle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
facle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: facle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,19 @@ faclt p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
|
||||
// CHECK-NEXT: faclt p0.b, p0/z, z0.b, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
faclt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: faclt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
faclt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: faclt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -68,3 +68,19 @@ fadd z0.h, p8/m, z0.h, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
|
||||
// CHECK-NEXT: fadd z0.h, p8/m, z0.h, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fadd z0.d, z1.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fadd z0.d, z1.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fadd z0.d, z1.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fadd z0.d, z1.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -90,3 +90,55 @@ fadd z0.d, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x00,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 00 df 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 3c d0 04 <unknown>
|
||||
|
||||
fadd z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fadd z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xd8,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c d8 65 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
fadd z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fadd z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xd8,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c d8 65 <unknown>
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fadd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fadd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc0,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c0 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fadd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fadd z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc0,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c0 65 <unknown>
|
||||
|
||||
@ -18,4 +18,19 @@ fadda h0, p8, h0, z31.h
|
||||
fadda v0.8h, p7, v0.8h, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: fadda v0.8h, p7, v0.8h, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
fadda d0, p7, d0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fadda d0, p7, d0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
fadda d0, p7, d0, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fadda d0, p7, d0, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -17,4 +17,19 @@ faddv h0, p8, z31.h
|
||||
faddv v0, p7, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: faddv v0, p7, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
faddv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: faddv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
faddv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: faddv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -42,3 +42,31 @@ fcadd z31.d, p7/m, z31.d, z31.d, #270
|
||||
// CHECK-ENCODING: [0xff,0x9f,0xc1,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff 9f c1 64 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
fcadd z4.d, p7/m, z4.d, z31.d, #270
|
||||
// CHECK-INST: fcadd z4.d, p7/m, z4.d, z31.d, #270
|
||||
// CHECK-ENCODING: [0xe4,0x9f,0xc1,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 9f c1 64 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
fcadd z4.d, p7/m, z4.d, z31.d, #270
|
||||
// CHECK-INST: fcadd z4.d, p7/m, z4.d, z31.d, #270
|
||||
// CHECK-ENCODING: [0xe4,0x9f,0xc1,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 9f c1 64 <unknown>
|
||||
|
||||
@ -9,3 +9,31 @@ fcmeq p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
|
||||
// CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmeq p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmeq p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmeq p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmeq p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,31 @@ fcmge p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
|
||||
// CHECK-NEXT: fcmge p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmge p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmge p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmge p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,31 @@ fcmgt p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
|
||||
// CHECK-NEXT: fcmgt p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmgt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmgt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmgt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -50,3 +50,13 @@ fcmla z0.d, z1.d, z2.d[0], #0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
|
||||
// CHECK-NEXT: fcmla z0.d, z1.d, z2.d[0], #0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z21.s, p0/z, z28.s
|
||||
fcmla z21.s, z10.s, z5.s[1], #90
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: fcmla z21.s, z10.s, z5.s[1], #90
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -102,3 +102,43 @@ fcmla z21.s, z10.s, z5.s[1], #90
|
||||
// CHECK-ENCODING: [0x55,0x15,0xf5,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 55 15 f5 64 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
fcmla z4.d, p7/m, z31.d, z31.d, #270
|
||||
// CHECK-INST: fcmla z4.d, p7/m, z31.d, z31.d, #270
|
||||
// CHECK-ENCODING: [0xe4,0x7f,0xdf,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 7f df 64 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
fcmla z4.d, p7/m, z31.d, z31.d, #270
|
||||
// CHECK-INST: fcmla z4.d, p7/m, z31.d, z31.d, #270
|
||||
// CHECK-ENCODING: [0xe4,0x7f,0xdf,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 7f df 64 <unknown>
|
||||
|
||||
movprfx z21, z28
|
||||
// CHECK-INST: movprfx z21, z28
|
||||
// CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 95 bf 20 04 <unknown>
|
||||
|
||||
fcmla z21.s, z10.s, z5.s[1], #90
|
||||
// CHECK-INST: fcmla z21.s, z10.s, z5.s[1], #90
|
||||
// CHECK-ENCODING: [0x55,0x15,0xf5,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 55 15 f5 64 <unknown>
|
||||
|
||||
@ -9,3 +9,31 @@ fcmle p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
|
||||
// CHECK-NEXT: fcmle p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmle p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmle p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmle p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,31 @@ fcmlt p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
|
||||
// CHECK-NEXT: fcmlt p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmlt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmlt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmlt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmlt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmlt p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,31 @@ fcmne p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
|
||||
// CHECK-NEXT: fcmne p0.s, p0/z, z0.s, #1.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmne p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmne p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmne p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmne p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmne p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -9,3 +9,19 @@ fcmuo p0.s, p0/z, z0.s, #0.0
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected floating point literal
|
||||
// CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, #0.0
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fcmuo p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fcmuo p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z1.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -1554,3 +1554,31 @@ fcpy z0.d, p0/m, #31.00000000
|
||||
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 20 d0 04 <unknown>
|
||||
|
||||
fcpy z0.d, p0/m, #31.00000000
|
||||
// CHECK-INST: fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fcpy z0.d, p0/m, #31.00000000
|
||||
// CHECK-INST: fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
|
||||
|
||||
@ -42,3 +42,31 @@ fcvt z0.d, p0/m, z0.s
|
||||
// CHECK-ENCODING: [0x00,0xa0,0xcb,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 a0 cb 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
|
||||
|
||||
fcvt z5.d, p0/m, z0.s
|
||||
// CHECK-INST: fcvt z5.d, p0/m, z0.s
|
||||
// CHECK-ENCODING: [0x05,0xa0,0xcb,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 a0 cb 65 <unknown>
|
||||
|
||||
movprfx z5, z7
|
||||
// CHECK-INST: movprfx z5, z7
|
||||
// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
|
||||
|
||||
fcvt z5.d, p0/m, z0.s
|
||||
// CHECK-INST: fcvt z5.d, p0/m, z0.s
|
||||
// CHECK-ENCODING: [0x05,0xa0,0xcb,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 a0 cb 65 <unknown>
|
||||
|
||||
@ -48,3 +48,31 @@ fcvtzs z0.d, p0/m, z0.d
|
||||
// CHECK-ENCODING: [0x00,0xa0,0xde,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 a0 de 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
|
||||
|
||||
fcvtzs z5.d, p0/m, z0.d
|
||||
// CHECK-INST: fcvtzs z5.d, p0/m, z0.d
|
||||
// CHECK-ENCODING: [0x05,0xa0,0xde,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 a0 de 65 <unknown>
|
||||
|
||||
movprfx z5, z7
|
||||
// CHECK-INST: movprfx z5, z7
|
||||
// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
|
||||
|
||||
fcvtzs z5.d, p0/m, z0.d
|
||||
// CHECK-INST: fcvtzs z5.d, p0/m, z0.d
|
||||
// CHECK-ENCODING: [0x05,0xa0,0xde,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 a0 de 65 <unknown>
|
||||
|
||||
@ -48,3 +48,31 @@ fcvtzu z0.d, p0/m, z0.d
|
||||
// CHECK-ENCODING: [0x00,0xa0,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 a0 df 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z5.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe5,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 20 d0 04 <unknown>
|
||||
|
||||
fcvtzu z5.d, p0/m, z0.d
|
||||
// CHECK-INST: fcvtzu z5.d, p0/m, z0.d
|
||||
// CHECK-ENCODING: [0x05,0xa0,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 a0 df 65 <unknown>
|
||||
|
||||
movprfx z5, z7
|
||||
// CHECK-INST: movprfx z5, z7
|
||||
// CHECK-ENCODING: [0xe5,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e5 bc 20 04 <unknown>
|
||||
|
||||
fcvtzu z5.d, p0/m, z0.d
|
||||
// CHECK-INST: fcvtzu z5.d, p0/m, z0.d
|
||||
// CHECK-ENCODING: [0x05,0xa0,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 05 a0 df 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fdiv z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fdiv z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fdiv z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fdiv z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xcd,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f cd 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fdivr z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f cc 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fdivr z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fdivr z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f cc 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fdivr z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fdivr z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xcc,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f cc 65 <unknown>
|
||||
|
||||
@ -62,3 +62,19 @@ fdup z0.d, #64.00000000 // r = 5, n = 32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or floating-point constant
|
||||
// CHECK-NEXT: fdup z0.d, #64.00000000 // r = 5, n = 32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fdup z0.d, #31.00000000
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fdup z0.d, #31.00000000
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fdup z0.d, #31.00000000
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fdup z0.d, #31.00000000
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -12,4 +12,19 @@ fexpa z0.b, z31.b
|
||||
fexpa z0.s, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: fexpa z0.s, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fexpa z0.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fexpa z0.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fexpa z0.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fexpa z0.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -24,3 +24,31 @@ fmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x9c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 9c ff 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x9c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 9c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x9c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 9c ff 65 <unknown>
|
||||
|
||||
@ -66,3 +66,55 @@ fmax z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c6 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 20 d0 04 <unknown>
|
||||
|
||||
fmax z0.d, p0/m, z0.d, #0.0
|
||||
// CHECK-INST: fmax z0.d, p0/m, z0.d, #0.0
|
||||
// CHECK-ENCODING: [0x00,0x80,0xde,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 80 de 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmax z0.d, p0/m, z0.d, #0.0
|
||||
// CHECK-INST: fmax z0.d, p0/m, z0.d, #0.0
|
||||
// CHECK-ENCODING: [0x00,0x80,0xde,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 00 80 de 65 <unknown>
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmax z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmax z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c6 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmax z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmax z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc6,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c6 65 <unknown>
|
||||
|
||||
@ -72,3 +72,55 @@ fmaxnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c4 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 3c d0 04 <unknown>
|
||||
|
||||
fmaxnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fmaxnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xdc,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c dc 65 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
fmaxnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fmaxnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xdc,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c dc 65 <unknown>
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmaxnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmaxnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c4 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmaxnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmaxnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc4,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c4 65 <unknown>
|
||||
|
||||
@ -17,4 +17,19 @@ fmaxnmv h0, p8, z31.h
|
||||
fmaxnmv v0, p7, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: fmaxnmv v0, p7, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
fmaxnmv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmaxnmv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
fmaxnmv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmaxnmv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -17,4 +17,19 @@ fmaxv h0, p8, z31.h
|
||||
fmaxv v0, p7, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: fmaxv v0, p7, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
fmaxv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmaxv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
fmaxv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmaxv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -72,3 +72,55 @@ fmin z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c7 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 3c d0 04 <unknown>
|
||||
|
||||
fmin z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fmin z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c df 65 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
fmin z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fmin z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c df 65 <unknown>
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmin z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmin z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c7 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmin z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmin z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc7,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c7 65 <unknown>
|
||||
|
||||
@ -72,3 +72,55 @@ fminnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c5 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 3c d0 04 <unknown>
|
||||
|
||||
fminnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fminnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xdd,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c dd 65 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
fminnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-INST: fminnm z31.d, p7/m, z31.d, #1.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xdd,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c dd 65 <unknown>
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fminnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fminnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c5 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fminnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fminnm z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc5,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c5 65 <unknown>
|
||||
|
||||
@ -17,4 +17,19 @@ fminnmv h0, p8, z31.h
|
||||
fminnmv v0, p7, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: fminnmv v0, p7, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
fminnmv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fminnmv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
fminnmv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fminnmv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -17,4 +17,19 @@ fminv h0, p8, z31.h
|
||||
fminv v0, p7, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||||
// CHECK-NEXT: fminv v0, p7, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
fminv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fminv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
fminv d0, p7, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fminv d0, p7, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -70,3 +70,13 @@ fmla z0.d, z1.d, z2.d[2]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
|
||||
// CHECK-NEXT: fmla z0.d, z1.d, z2.d[2]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fmla z0.d, z1.d, z7.d[1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: fmla z0.d, z1.d, z7.d[1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -42,3 +42,43 @@ fmla z0.d, z1.d, z7.d[1]
|
||||
// CHECK-ENCODING: [0x20,0x00,0xf7,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 00 f7 64 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 1c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x1c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 1c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmla z0.d, z1.d, z7.d[1]
|
||||
// CHECK-INST: fmla z0.d, z1.d, z7.d[1]
|
||||
// CHECK-ENCODING: [0x20,0x00,0xf7,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 00 f7 64 <unknown>
|
||||
|
||||
@ -70,3 +70,13 @@ fmls z0.d, z1.d, z2.d[2]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].
|
||||
// CHECK-NEXT: fmls z0.d, z1.d, z2.d[2]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fmls z0.d, z1.d, z7.d[1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
|
||||
// CHECK-NEXT: fmls z0.d, z1.d, z7.d[1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -42,3 +42,43 @@ fmls z0.d, z1.d, z7.d[1]
|
||||
// CHECK-ENCODING: [0x20,0x04,0xf7,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 04 f7 64 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x3c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 3c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x3c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 3c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmls z0.d, z1.d, z7.d[1]
|
||||
// CHECK-INST: fmls z0.d, z1.d, z7.d[1]
|
||||
// CHECK-ENCODING: [0x20,0x04,0xf7,0x64]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 04 f7 64 <unknown>
|
||||
|
||||
@ -140,3 +140,19 @@ fmov z0.d, p0/m, #64.00000000 // r = 5, n = 32
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected compatible register or floating-point constant
|
||||
// CHECK-NEXT: fmov z0.d, p0/m, #64.00000000 // r = 5, n = 32
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fmov z0.d, #31.00000000
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmov z0.d, #31.00000000
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fmov z0.d, #31.00000000
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmov z0.d, #31.00000000
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -1596,3 +1596,31 @@ fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p0/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x20,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 20 d0 04 <unknown>
|
||||
|
||||
fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-INST: fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-INST: fmov z0.d, p0/m, #31.00000000
|
||||
// CHECK-ENCODING: [0xe0,0xc7,0xd0,0x05]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 c7 d0 05 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xbc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 bc ff 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xbc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 bc ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xbc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 bc ff 65 <unknown>
|
||||
|
||||
@ -132,3 +132,31 @@ fmul z0.h, p8/m, z0.h, z31.h
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
|
||||
// CHECK-NEXT: fmul z0.h, p8/m, z0.h, z31.h
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
fmul z0.d, z1.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmul z0.d, z1.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
fmul z0.d, z1.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmul z0.d, z1.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31.d, p0/z, z6.d
|
||||
fmul z31.d, z31.d, z15.d[1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmul z31.d, z31.d, z15.d[1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z31, z6
|
||||
fmul z31.d, z31.d, z15.d[1]
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: fmul z31.d, z31.d, z15.d[1]
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -120,3 +120,55 @@ fmul z0.d, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x08,0xdf,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 08 df 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z31.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df 3c d0 04 <unknown>
|
||||
|
||||
fmul z31.d, p7/m, z31.d, #2.0
|
||||
// CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c da 65 <unknown>
|
||||
|
||||
movprfx z31, z6
|
||||
// CHECK-INST: movprfx z31, z6
|
||||
// CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: df bc 20 04 <unknown>
|
||||
|
||||
fmul z31.d, p7/m, z31.d, #2.0
|
||||
// CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
|
||||
// CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 3f 9c da 65 <unknown>
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmul z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c2 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmul z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f c2 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fmulx z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f ca 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fmulx z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmulx z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f ca 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fmulx z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-INST: fmulx z0.d, p7/m, z0.d, z31.d
|
||||
// CHECK-ENCODING: [0xe0,0x9f,0xca,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 9f ca 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fneg z31.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xff,0xbf,0xdd,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: ff bf dd 04 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-INST: movprfx z4.d, p7/z, z6.d
|
||||
// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
|
||||
|
||||
fneg z4.d, p7/m, z31.d
|
||||
// CHECK-INST: fneg z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xdd,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf dd 04 <unknown>
|
||||
|
||||
movprfx z4, z6
|
||||
// CHECK-INST: movprfx z4, z6
|
||||
// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
|
||||
|
||||
fneg z4.d, p7/m, z31.d
|
||||
// CHECK-INST: fneg z4.d, p7/m, z31.d
|
||||
// CHECK-ENCODING: [0xe4,0xbf,0xdd,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e4 bf dd 04 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fnmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xdc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 dc ff 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fnmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xdc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 dc ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fnmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmad z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xdc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 dc ff 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fnmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x5c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 5c ff 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fnmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x5c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 5c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fnmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmla z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x5c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 5c ff 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fnmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x7c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 7c ff 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fnmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x7c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 7c ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fnmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmls z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0x7c,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 7c ff 65 <unknown>
|
||||
|
||||
@ -24,3 +24,31 @@ fnmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xfc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 fc ff 65 <unknown>
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Test compatibility with MOVPRFX instruction.
|
||||
|
||||
movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-INST: movprfx z0.d, p7/z, z7.d
|
||||
// CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 3c d0 04 <unknown>
|
||||
|
||||
fnmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xfc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 fc ff 65 <unknown>
|
||||
|
||||
movprfx z0, z7
|
||||
// CHECK-INST: movprfx z0, z7
|
||||
// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
|
||||
|
||||
fnmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-INST: fnmsb z0.d, p7/m, z1.d, z31.d
|
||||
// CHECK-ENCODING: [0x20,0xfc,0xff,0x65]
|
||||
// CHECK-ERROR: instruction requires: sve
|
||||
// CHECK-UNKNOWN: 20 fc ff 65 <unknown>
|
||||
|
||||
@ -3,4 +3,19 @@
|
||||
frecpe z0.b, z31.b
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: frecpe z0.b, z31.b
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
frecpe z0.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: frecpe z0.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
frecpe z0.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: frecpe z0.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
@ -13,3 +13,19 @@ frecps z0.h, z1.s, z2.s
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||||
// CHECK-NEXT: frecps z0.h, z1.s, z2.s
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
|
||||
// --------------------------------------------------------------------------//
|
||||
// Negative tests for instructions that are incompatible with movprfx
|
||||
|
||||
movprfx z0.d, p0/z, z7.d
|
||||
frecps z0.d, z1.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: frecps z0.d, z1.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
movprfx z0, z7
|
||||
frecps z0.d, z1.d, z31.d
|
||||
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
|
||||
// CHECK-NEXT: frecps z0.d, z1.d, z31.d
|
||||
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user