1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00

Fundamentally change the MipsSubtarget replacement machinery:

a) Move the replacement level decision to the target machine.
b) Create additional subtargets at the TargetMachine level to
   cache and make replacement easy.
c) Make the mips16 features obvious.
d) Remove the override logic as it no longer does anything.
e) Have MipsModuleDAGToDAGISel take only the target machine.
f) Have the constant islands pass grab the current subtarget
   from the MachineFunction (via the TargetMachine) instead
   of caching it.
g) Unconditionally initialize TLOF.
h) Remove the old complicated subtarget based resetting and
   replace it with simple conditionals.

llvm-svn: 213430
This commit is contained in:
Eric Christopher 2014-07-18 23:41:32 +00:00
parent 94e920b613
commit e359626e4c
11 changed files with 53 additions and 124 deletions

View File

@ -37,6 +37,7 @@ using namespace llvm;
#define DEBUG_TYPE "mips-isel"
bool Mips16DAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
Subtarget = &TM.getSubtarget<MipsSubtarget>();
if (!Subtarget->inMips16Mode())
return false;
return MipsDAGToDAGISel::runOnMachineFunction(MF);

View File

@ -61,9 +61,9 @@ bool MipsAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
Subtarget = &TM.getSubtarget<MipsSubtarget>();
// Initialize TargetLoweringObjectFile.
if (Subtarget->allowMixed16_32())
const_cast<TargetLoweringObjectFile&>(getObjFileLowering())
const_cast<TargetLoweringObjectFile &>(getObjFileLowering())
.Initialize(OutContext, TM);
MipsFI = MF.getInfo<MipsFunctionInfo>();
if (Subtarget->inMips16Mode())
for (std::map<

View File

@ -365,11 +365,10 @@ namespace {
public:
static char ID;
MipsConstantIslands(TargetMachine &tm)
: MachineFunctionPass(ID), TM(tm),
IsPIC(TM.getRelocationModel() == Reloc::PIC_),
ABI(TM.getSubtarget<MipsSubtarget>().getTargetABI()),
STI(&TM.getSubtarget<MipsSubtarget>()), MF(nullptr), MCP(nullptr),
PrescannedForConstants(false){}
: MachineFunctionPass(ID), TM(tm),
IsPIC(TM.getRelocationModel() == Reloc::PIC_),
ABI(TM.getSubtarget<MipsSubtarget>().getTargetABI()), STI(nullptr),
MF(nullptr), MCP(nullptr), PrescannedForConstants(false) {}
const char *getPassName() const override {
return "Mips Constant Islands";
@ -450,9 +449,9 @@ bool MipsConstantIslands::runOnMachineFunction(MachineFunction &mf) {
// FIXME:
MF = &mf;
MCP = mf.getConstantPool();
STI = &mf.getTarget().getSubtarget<MipsSubtarget>();
DEBUG(dbgs() << "constant island machine function " << "\n");
if (!TM.getSubtarget<MipsSubtarget>().inMips16Mode() ||
!MipsSubtarget::useConstantIslands()) {
if (!STI->inMips16Mode() || !MipsSubtarget::useConstantIslands()) {
return false;
}
TII = (const Mips16InstrInfo*)MF->getTarget().getInstrInfo();

View File

@ -32,7 +32,7 @@ namespace llvm {
class MipsDAGToDAGISel : public SelectionDAGISel {
public:
explicit MipsDAGToDAGISel(MipsTargetMachine &TM)
: SelectionDAGISel(TM), Subtarget(&TM.getSubtarget<MipsSubtarget>()) {}
: SelectionDAGISel(TM), Subtarget(nullptr) {}
// Pass Name
const char *getPassName() const override {

View File

@ -20,7 +20,7 @@ namespace llvm {
bool MipsModuleDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
DEBUG(errs() << "In MipsModuleDAGToDAGISel::runMachineFunction\n");
const_cast<MipsSubtarget&>(Subtarget).resetSubtarget(&MF);
TM.resetSubtarget(&MF);
return false;
}

View File

@ -37,8 +37,7 @@ public:
static char ID;
explicit MipsModuleDAGToDAGISel(MipsTargetMachine &TM_)
: MachineFunctionPass(ID),
TM(TM_), Subtarget(TM.getSubtarget<MipsSubtarget>()) {}
: MachineFunctionPass(ID), TM(TM_) {}
// Pass Name
const char *getPassName() const override {
@ -48,10 +47,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
protected:
/// Keep a pointer to the MipsSubtarget around so that we can make the right
/// decision when generating code for different targets.
const TargetMachine &TM;
const MipsSubtarget &Subtarget;
MipsTargetMachine &TM;
};
/// createMipsISelDag - This pass converts a legalized DAG into a

View File

@ -37,6 +37,7 @@ using namespace llvm;
#define DEBUG_TYPE "mips-isel"
bool MipsSEDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
Subtarget = &TM.getSubtarget<MipsSubtarget>();
if (Subtarget->inMips16Mode())
return false;
return MipsDAGToDAGISel::runOnMachineFunction(MF);

View File

@ -113,7 +113,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
HasMips4_32r2(false), HasMips5_32r2(false), InMips16Mode(false),
InMips16HardFloat(Mips16HardFloat), InMicroMipsMode(false), HasDSP(false),
HasDSPR2(false), AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16),
HasMSA(false), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT),
HasMSA(false), TM(_TM), TargetTriple(TT),
DL(computeDataLayout(initializeSubtargetDependencies(CPU, FS, TM))),
TSInfo(DL), JITInfo(), InstrInfo(MipsInstrInfo::create(*this)),
FrameLowering(MipsFrameLowering::create(*this)),
@ -205,86 +205,6 @@ MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
return *this;
}
//FIXME: This logic for reseting the subtarget along with
// the helper classes can probably be simplified but there are a lot of
// cases so we will defer rewriting this to later.
//
void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
bool ChangeToMips16 = false, ChangeToNoMips16 = false;
DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
AttributeSet FnAttrs = MF->getFunction()->getAttributes();
ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
"mips16");
ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
"nomips16");
assert (!(ChangeToMips16 & ChangeToNoMips16) &&
"mips16 and nomips16 specified on the same function");
if (ChangeToMips16) {
if (PreviousInMips16Mode)
return;
OverrideMode = Mips16Override;
PreviousInMips16Mode = true;
setHelperClassesMips16();
return;
} else if (ChangeToNoMips16) {
if (!PreviousInMips16Mode)
return;
OverrideMode = NoMips16Override;
PreviousInMips16Mode = false;
setHelperClassesMipsSE();
return;
} else {
if (OverrideMode == NoOverride)
return;
OverrideMode = NoOverride;
DEBUG(dbgs() << "back to default" << "\n");
if (inMips16Mode() && !PreviousInMips16Mode) {
setHelperClassesMips16();
PreviousInMips16Mode = true;
} else if (!inMips16Mode() && PreviousInMips16Mode) {
setHelperClassesMipsSE();
PreviousInMips16Mode = false;
}
return;
}
}
void MipsSubtarget::setHelperClassesMips16() {
InstrInfoSE.swap(InstrInfo);
FrameLoweringSE.swap(FrameLowering);
TLInfoSE.swap(TLInfo);
if (!InstrInfo16) {
InstrInfo.reset(MipsInstrInfo::create(*this));
FrameLowering.reset(MipsFrameLowering::create(*this));
TLInfo.reset(MipsTargetLowering::create(*TM, *this));
} else {
InstrInfo16.swap(InstrInfo);
FrameLowering16.swap(FrameLowering);
TLInfo16.swap(TLInfo);
}
assert(TLInfo && "null target lowering 16");
assert(InstrInfo && "null instr info 16");
assert(FrameLowering && "null frame lowering 16");
}
void MipsSubtarget::setHelperClassesMipsSE() {
InstrInfo16.swap(InstrInfo);
FrameLowering16.swap(FrameLowering);
TLInfo16.swap(TLInfo);
if (!InstrInfoSE) {
InstrInfo.reset(MipsInstrInfo::create(*this));
FrameLowering.reset(MipsFrameLowering::create(*this));
TLInfo.reset(MipsTargetLowering::create(*TM, *this));
} else {
InstrInfoSE.swap(InstrInfo);
FrameLoweringSE.swap(FrameLowering);
TLInfoSE.swap(TLInfo);
}
assert(TLInfo && "null target lowering in SE");
assert(InstrInfo && "null instr info SE");
assert(FrameLowering && "null frame lowering SE");
}
bool MipsSubtarget::abiUsesSoftFloat() const {
return TM->Options.UseSoftFloat && !InMips16HardFloat;
}

View File

@ -149,12 +149,6 @@ protected:
std::unique_ptr<const MipsInstrInfo> InstrInfo;
std::unique_ptr<const MipsFrameLowering> FrameLowering;
std::unique_ptr<const MipsTargetLowering> TLInfo;
std::unique_ptr<const MipsInstrInfo> InstrInfo16;
std::unique_ptr<const MipsFrameLowering> FrameLowering16;
std::unique_ptr<const MipsTargetLowering> TLInfo16;
std::unique_ptr<const MipsInstrInfo> InstrInfoSE;
std::unique_ptr<const MipsFrameLowering> FrameLoweringSE;
std::unique_ptr<const MipsTargetLowering> TLInfoSE;
public:
/// This overrides the PostRAScheduler bit in the SchedModel for each CPU.
@ -216,17 +210,7 @@ public:
bool isSingleFloat() const { return IsSingleFloat; }
bool isNotSingleFloat() const { return !IsSingleFloat; }
bool hasVFPU() const { return HasVFPU; }
bool inMips16Mode() const {
switch (OverrideMode) {
case NoOverride:
return InMips16Mode;
case Mips16Override:
return true;
case NoMips16Override:
return false;
}
llvm_unreachable("Unexpected mode");
}
bool inMips16Mode() const { return InMips16Mode; }
bool inMips16ModeDefault() const {
return InMips16Mode;
}
@ -274,9 +258,6 @@ public:
// Grab relocation model
Reloc::Model getRelocationModel() const;
/// \brief Reset the subtarget for the Mips target.
void resetSubtarget(MachineFunction *MF);
MipsSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
const TargetMachine *TM);

View File

@ -56,7 +56,12 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, StringRef TT,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool isLittle)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, isLittle, this) {
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, this),
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
isLittle, this),
Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",
isLittle, this) {
Subtarget = &DefaultSubtarget;
initAsmInfo();
}
@ -78,6 +83,23 @@ MipselTargetMachine(const Target &T, StringRef TT,
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
DEBUG(dbgs() << "resetSubtarget\n");
AttributeSet FnAttrs = MF->getFunction()->getAttributes();
bool Mips16Attr = FnAttrs.hasAttribute(AttributeSet::FunctionIndex, "mips16");
bool NoMips16Attr =
FnAttrs.hasAttribute(AttributeSet::FunctionIndex, "nomips16");
assert(!(Mips16Attr && NoMips16Attr) &&
"mips16 and nomips16 specified on the same function");
if (Mips16Attr)
Subtarget = &Mips16Subtarget;
else if (NoMips16Attr)
Subtarget = &NoMips16Subtarget;
else
Subtarget = &DefaultSubtarget;
return;
}
namespace {
/// Mips Code Generator Pass Configuration Options.
class MipsPassConfig : public TargetPassConfig {
@ -145,7 +167,7 @@ bool MipsPassConfig::addPreRegAlloc() {
}
void MipsTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
if (Subtarget.allowMixed16_32()) {
if (Subtarget->allowMixed16_32()) {
DEBUG(errs() << "No ");
//FIXME: The Basic Target Transform Info
// pass needs to become a function pass instead of

View File

@ -25,7 +25,10 @@ class formatted_raw_ostream;
class MipsRegisterInfo;
class MipsTargetMachine : public LLVMTargetMachine {
MipsSubtarget Subtarget;
MipsSubtarget *Subtarget;
MipsSubtarget DefaultSubtarget;
MipsSubtarget NoMips16Subtarget;
MipsSubtarget Mips16Subtarget;
public:
MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
@ -42,14 +45,18 @@ public:
const TargetFrameLowering *getFrameLowering() const override {
return getSubtargetImpl()->getFrameLowering();
}
const MipsSubtarget *getSubtargetImpl() const override { return &Subtarget; }
const MipsSubtarget *getSubtargetImpl() const override {
if (Subtarget)
return Subtarget;
return &DefaultSubtarget;
}
const InstrItineraryData *getInstrItineraryData() const override {
return Subtarget.inMips16Mode()
return Subtarget->inMips16Mode()
? nullptr
: &getSubtargetImpl()->getInstrItineraryData();
}
MipsJITInfo *getJITInfo() override {
return Subtarget.getJITInfo();
return Subtarget->getJITInfo();
}
const MipsRegisterInfo *getRegisterInfo() const override {
return getSubtargetImpl()->getRegisterInfo();
@ -63,6 +70,8 @@ public:
const MipsSelectionDAGInfo* getSelectionDAGInfo() const override {
return getSubtargetImpl()->getSelectionDAGInfo();
}
/// \brief Reset the subtarget for the Mips target.
void resetSubtarget(MachineFunction *MF);
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;