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MachineCSE shouldn't extend the live ranges of reserved or allocatable registers.
llvm-svn: 150653
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395d7dee0e
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@ -63,6 +63,8 @@ namespace {
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virtual void releaseMemory() {
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ScopeMap.clear();
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Exps.clear();
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AllocatableRegs.clear();
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ReservedRegs.clear();
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}
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private:
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@ -76,6 +78,8 @@ namespace {
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ScopedHTType VNT;
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SmallVector<MachineInstr*, 64> Exps;
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unsigned CurrVN;
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BitVector AllocatableRegs;
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BitVector ReservedRegs;
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bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB);
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bool isPhysDefTriviallyDead(unsigned Reg,
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@ -236,9 +240,9 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
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return false;
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for (unsigned i = 0, e = PhysDefs.size(); i != e; ++i) {
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if (TRI->isInAllocatableClass(PhysDefs[i]))
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// Avoid extending live range of physical registers unless
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// they are unallocatable.
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if (AllocatableRegs.test(PhysDefs[i]) || ReservedRegs.test(PhysDefs[i]))
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// Avoid extending live range of physical registers if they are
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//allocatable or reserved.
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return false;
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}
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CrossMBB = true;
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@ -588,5 +592,7 @@ bool MachineCSE::runOnMachineFunction(MachineFunction &MF) {
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MRI = &MF.getRegInfo();
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AA = &getAnalysis<AliasAnalysis>();
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DT = &getAnalysis<MachineDominatorTree>();
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AllocatableRegs = TRI->getAllocatableSet(MF);
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ReservedRegs = TRI->getReservedRegs(MF);
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return PerformCSE(DT->getRootNode());
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}
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