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[LSR] Handle case 1*reg => reg. PR50918
This patch addresses assertion failure in case when the only found formula for LSR is `1*reg => reg` which was supposed to be an impossible situation, however there is a test that shows it is possible. In this case, we can use scale register with scale of 1 as the missing base register. Reviewed By: huihuiz, reames Differential Revision: https://reviews.llvm.org/D105009
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@ -511,9 +511,16 @@ bool Formula::isCanonical(const Loop &L) const {
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void Formula::canonicalize(const Loop &L) {
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void Formula::canonicalize(const Loop &L) {
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if (isCanonical(L))
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if (isCanonical(L))
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return;
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return;
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// So far we did not need this case. This is easy to implement but it is
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// useless to maintain dead code. Beside it could hurt compile time.
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if (BaseRegs.empty()) {
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assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
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// No base reg? Use scale reg with scale = 1 as such.
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assert(ScaledReg && "Expected 1*reg => reg");
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assert(Scale == 1 && "Expected 1*reg => reg");
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BaseRegs.push_back(ScaledReg);
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Scale = 0;
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ScaledReg = nullptr;
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return;
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}
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// Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
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// Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
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if (!ScaledReg) {
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if (!ScaledReg) {
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41
test/Transforms/LoopStrengthReduce/pr50918.ll
Normal file
41
test/Transforms/LoopStrengthReduce/pr50918.ll
Normal file
@ -0,0 +1,41 @@
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; RUN: opt -S -loop-reduce < %s | FileCheck %s
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;
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; Make sure we don't fail an assertion here.
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
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target triple = "x86_64-unknown-linux-gnu"
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define void @test() {
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; CHECK-LABEL: test
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bb:
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br label %bb1
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bb1: ; preds = %bb12, %bb
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%tmp2 = phi i64 [ 94, %bb ], [ %tmp20, %bb12 ]
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%tmp3 = phi i32 [ -28407, %bb ], [ %tmp23, %bb12 ]
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%tmp4 = trunc i64 %tmp2 to i32
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%tmp5 = add i32 %tmp3, %tmp4
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%tmp6 = mul i32 undef, %tmp5
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%tmp7 = sub i32 %tmp6, %tmp5
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%tmp8 = shl i32 %tmp7, 1
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%tmp9 = add i32 %tmp8, %tmp3
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%tmp10 = add i32 %tmp9, %tmp4
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%tmp11 = shl i32 %tmp10, 1
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br label %bb21
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bb12: ; preds = %bb21
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%tmp13 = mul i32 %tmp22, -101
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%tmp14 = add i32 %tmp22, 2
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%tmp15 = add i32 %tmp14, %tmp13
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%tmp16 = trunc i32 %tmp15 to i8
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%tmp17 = shl i8 %tmp16, 5
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%tmp18 = add i8 %tmp17, 64
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%tmp19 = sext i8 %tmp18 to i32
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%tmp20 = add nsw i64 %tmp2, -3
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br label %bb1
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bb21: ; preds = %bb21, %bb1
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%tmp22 = phi i32 [ %tmp11, %bb1 ], [ %tmp23, %bb21 ]
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%tmp23 = add i32 %tmp22, 1
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br i1 false, label %bb12, label %bb21
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}
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