diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index 60969ffca59..248efc11b87 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -441,6 +441,9 @@ public: ConstantInt* Mask = dyn_cast(AndI.getOperand(1)); return Mask && Mask->getValue().isIntN(16); } + bool convertSetCCLogicToBitwiseLogic(EVT VT) const override { + return VT.isScalarInteger(); + } EVT getSetCCResultType(const DataLayout &DL, LLVMContext &, EVT) const override; bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF, diff --git a/test/CodeGen/SystemZ/int-cmp-61.ll b/test/CodeGen/SystemZ/int-cmp-61.ll new file mode 100644 index 00000000000..f57944c738d --- /dev/null +++ b/test/CodeGen/SystemZ/int-cmp-61.ll @@ -0,0 +1,25 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s +; +; Test using bitwise logic on icmp operands instead of i1 logic when +; possible. + +define i32 @fun(i32* %Src) { +; CHECK-LABEL: fun: +; CHECK: # %bb.0: # %bb +; CHECK-NEXT: lhi %r0, -2 +; CHECK-NEXT: s %r0, 0(%r2) +; CHECK-NEXT: nill %r0, 65533 +; CHECK-NEXT: chi %r0, 0 +; CHECK-NEXT: lhi %r2, 0 +; CHECK-NEXT: lochilh %r2, 1 +; CHECK-NEXT: br %r14 +bb: + %i = load i32, i32* %Src + %i3 = sub nsw i32 0, %i + %i4 = icmp ne i32 %i3, 2 + %i5 = icmp ne i32 %i3, 4 + %i6 = and i1 %i4, %i5 + %i7 = zext i1 %i6 to i32 + ret i32 %i7 +}