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[SystemZ] Don't use libcall for 128 bit shifts.
Expand 128 bit shifts instead of using a libcall. This patch removes the 128 bit shift libcalls and thereby causes ExpandShiftWithUnknownAmountBit() to be called. Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D101993
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@ -285,10 +285,13 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
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// Give LowerOperation the chance to replace 64-bit ORs with subregs.
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setOperationAction(ISD::OR, MVT::i64, Custom);
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// FIXME: Can we support these natively?
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// Expand 128 bit shifts without using a libcall.
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setOperationAction(ISD::SRL_PARTS, MVT::i64, Expand);
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setOperationAction(ISD::SHL_PARTS, MVT::i64, Expand);
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setOperationAction(ISD::SRA_PARTS, MVT::i64, Expand);
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setLibcallName(RTLIB::SRL_I128, nullptr);
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setLibcallName(RTLIB::SHL_I128, nullptr);
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setLibcallName(RTLIB::SRA_I128, nullptr);
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// We have native instructions for i8, i16 and i32 extensions, but not i1.
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setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
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@ -2,7 +2,7 @@
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; Test removal of AND operations that don't affect last 6 bits of shift amount
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; operand.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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; Test that AND is not removed when some lower 6 bits are not set.
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define i32 @f1(i32 %a, i32 %sh) {
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@ -119,31 +119,28 @@ define i32 @f10(i32 %a, i32 %sh) {
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ret i32 %reuse
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}
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; Test that AND is not removed for i128 (which calls __ashlti3)
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define i128 @f11(i128 %a, i32 %sh) {
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; CHECK-LABEL: f11:
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; CHECK: # %bb.0:
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; CHECK-NEXT: stmg %r13, %r15, 104(%r15)
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; CHECK-NEXT: .cfi_offset %r13, -56
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; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: .cfi_offset %r14, -48
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: aghi %r15, -192
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; CHECK-NEXT: .cfi_def_cfa_offset 352
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; CHECK-NEXT: lg %r0, 8(%r3)
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; CHECK-NEXT: # kill: def $r4l killed $r4l def $r4d
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; CHECK-NEXT: lgr %r13, %r2
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; CHECK-NEXT: lg %r1, 0(%r3)
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; CHECK-NEXT: stg %r0, 168(%r15)
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; CHECK-NEXT: risbg %r4, %r4, 57, 191, 0
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; CHECK-NEXT: la %r2, 176(%r15)
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; CHECK-NEXT: la %r3, 160(%r15)
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; CHECK-NEXT: stg %r1, 160(%r15)
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; CHECK-NEXT: brasl %r14, __ashlti3@PLT
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; CHECK-NEXT: lg %r0, 184(%r15)
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; CHECK-NEXT: lg %r1, 176(%r15)
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; CHECK-NEXT: stg %r0, 8(%r13)
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; CHECK-NEXT: stg %r1, 0(%r13)
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; CHECK-NEXT: lmg %r13, %r15, 296(%r15)
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; CHECK-NEXT: risblg %r3, %r4, 25, 159, 0
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; CHECK-NEXT: lcr %r14, %r3
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; CHECK-NEXT: sllg %r5, %r1, 0(%r4)
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; CHECK-NEXT: srlg %r14, %r0, 0(%r14)
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; CHECK-NEXT: ogr %r5, %r14
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; CHECK-NEXT: sllg %r3, %r0, -64(%r3)
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; CHECK-NEXT: tmll %r4, 127
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; CHECK-NEXT: locgrle %r3, %r5
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; CHECK-NEXT: sllg %r0, %r0, 0(%r4)
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; CHECK-NEXT: locgre %r3, %r1
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; CHECK-NEXT: locghinle %r0, 0
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; CHECK-NEXT: stg %r0, 8(%r2)
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; CHECK-NEXT: stg %r3, 0(%r2)
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; CHECK-NEXT: lmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: br %r14
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%and = and i32 %sh, 127
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%ext = zext i32 %and to i128
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@ -151,3 +148,62 @@ define i128 @f11(i128 %a, i32 %sh) {
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ret i128 %shift
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}
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define i128 @f12(i128 %a, i32 %sh) {
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; CHECK-LABEL: f12:
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; CHECK: # %bb.0:
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; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: .cfi_offset %r14, -48
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: lg %r0, 0(%r3)
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; CHECK-NEXT: lg %r1, 8(%r3)
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; CHECK-NEXT: risblg %r3, %r4, 25, 159, 0
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; CHECK-NEXT: lcr %r14, %r3
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; CHECK-NEXT: srlg %r5, %r1, 0(%r4)
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; CHECK-NEXT: sllg %r14, %r0, 0(%r14)
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; CHECK-NEXT: ogr %r5, %r14
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; CHECK-NEXT: srlg %r3, %r0, -64(%r3)
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; CHECK-NEXT: tmll %r4, 127
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; CHECK-NEXT: locgrle %r3, %r5
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; CHECK-NEXT: srlg %r0, %r0, 0(%r4)
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; CHECK-NEXT: locgre %r3, %r1
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; CHECK-NEXT: locghinle %r0, 0
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; CHECK-NEXT: stg %r0, 0(%r2)
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; CHECK-NEXT: stg %r3, 8(%r2)
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; CHECK-NEXT: lmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: br %r14
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%and = and i32 %sh, 127
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%ext = zext i32 %and to i128
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%shift = lshr i128 %a, %ext
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ret i128 %shift
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}
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define i128 @f13(i128 %a, i32 %sh) {
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; CHECK-LABEL: f13:
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; CHECK: # %bb.0:
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; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: .cfi_offset %r14, -48
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: lg %r0, 0(%r3)
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; CHECK-NEXT: lg %r1, 8(%r3)
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; CHECK-NEXT: risblg %r3, %r4, 25, 159, 0
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; CHECK-NEXT: lcr %r14, %r3
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; CHECK-NEXT: srlg %r5, %r1, 0(%r4)
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; CHECK-NEXT: sllg %r14, %r0, 0(%r14)
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; CHECK-NEXT: ogr %r5, %r14
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; CHECK-NEXT: srag %r14, %r0, 0(%r4)
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; CHECK-NEXT: srag %r3, %r0, -64(%r3)
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; CHECK-NEXT: srag %r0, %r0, 63
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; CHECK-NEXT: tmll %r4, 127
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; CHECK-NEXT: locgrle %r3, %r5
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; CHECK-NEXT: locgre %r3, %r1
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; CHECK-NEXT: locgrle %r0, %r14
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; CHECK-NEXT: stg %r0, 0(%r2)
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; CHECK-NEXT: stg %r3, 8(%r2)
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; CHECK-NEXT: lmg %r14, %r15, 112(%r15)
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; CHECK-NEXT: br %r14
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%and = and i32 %sh, 127
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%ext = zext i32 %and to i128
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%shift = ashr i128 %a, %ext
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ret i128 %shift
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}
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