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[ARM][MVE] Only tail-fold integer add reductions
If a vector body has live-out values, it is probably a reduction, which needs a final reduction step after the loop. MVE has a VADDV instruction to reduce integer vectors, but doesn't have an equivalent one for float vectors. A live-out value that is not recognised as reduction later in the optimisation pipeline will result in the tail-predicated loop to be reverted to a non-predicated loop and this is very expensive, i.e. it has a significant performance impact, which is what we hope to avoid with fine tuning the ARM TTI hook preferPredicateOverEpilogue implementation. Differential Revision: https://reviews.llvm.org/D82953
This commit is contained in:
Sjoerd Meijer
parent
d549b86c4b
commit
e5c42c0c3a
@ -28,6 +28,7 @@
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/MachineValueType.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Transforms/Utils/LoopUtils.h"
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#include <algorithm>
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#include <cassert>
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#include <cstdint>
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@ -1405,12 +1406,47 @@ static bool canTailPredicateInstruction(Instruction &I, int &ICmpCount) {
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static bool canTailPredicateLoop(Loop *L, LoopInfo *LI, ScalarEvolution &SE,
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const DataLayout &DL,
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const LoopAccessInfo *LAI) {
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LLVM_DEBUG(dbgs() << "Tail-predication: checking allowed instructions\n");
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// If there are live-out values, it is probably a reduction, which needs a
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// final reduction step after the loop. MVE has a VADDV instruction to reduce
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// integer vectors, but doesn't have an equivalent one for float vectors. A
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// live-out value that is not recognised as a reduction will result in the
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// tail-predicated loop to be reverted to a non-predicated loop and this is
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// very expensive, i.e. it has a significant performance impact. So, in this
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// case it's better not to tail-predicate the loop, which is what we check
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// here. Thus, we allow only 1 live-out value, which has to be an integer
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// reduction, which matches the loops supported by ARMLowOverheadLoops.
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// It is important to keep ARMLowOverheadLoops and canTailPredicateLoop in
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// sync with each other.
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SmallVector< Instruction *, 8 > LiveOuts;
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LiveOuts = llvm::findDefsUsedOutsideOfLoop(L);
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bool IntReductionsDisabled =
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EnableTailPredication == TailPredication::EnabledNoReductions ||
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EnableTailPredication == TailPredication::ForceEnabledNoReductions;
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for (auto *I : LiveOuts) {
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if (!I->getType()->isIntegerTy()) {
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LLVM_DEBUG(dbgs() << "Don't tail-predicate loop with non-integer "
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"live-out value\n");
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return false;
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}
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if (I->getOpcode() != Instruction::Add) {
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LLVM_DEBUG(dbgs() << "Only add reductions supported\n");
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return false;
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}
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if (IntReductionsDisabled) {
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LLVM_DEBUG(dbgs() << "Integer add reductions not enabled\n");
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return false;
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}
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}
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// Next, check that all instructions can be tail-predicated.
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PredicatedScalarEvolution PSE = LAI->getPSE();
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SmallVector<Instruction *, 16> LoadStores;
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int ICmpCount = 0;
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int Stride = 0;
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LLVM_DEBUG(dbgs() << "tail-predication: checking allowed instructions\n");
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SmallVector<Instruction *, 16> LoadStores;
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for (BasicBlock *BB : L->blocks()) {
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for (Instruction &I : BB->instructionsWithoutDebug()) {
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if (isa<PHINode>(&I))
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@ -1458,8 +1494,10 @@ bool ARMTTIImpl::preferPredicateOverEpilogue(Loop *L, LoopInfo *LI,
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TargetLibraryInfo *TLI,
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DominatorTree *DT,
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const LoopAccessInfo *LAI) {
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if (!EnableTailPredication)
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if (!EnableTailPredication) {
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LLVM_DEBUG(dbgs() << "Tail-predication not enabled.\n");
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return false;
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}
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// Creating a predicated vector loop is the first step for generating a
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// tail-predicated hardware loop, for which we need the MVE masked
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@ -4,6 +4,13 @@
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; RUN: opt < %s -loop-vectorize -tail-predication=enabled -prefer-predicate-over-epilog -S | \
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; RUN: FileCheck -check-prefixes=COMMON,PREDFLAG %s
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; RUN: opt < %s -loop-vectorize -tail-predication=enabled-no-reductions -S | \
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; RUN: FileCheck %s -check-prefixes=COMMON,NORED
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; RUN: opt < %s -loop-vectorize -tail-predication=force-enabled-no-reductions -S | \
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; RUN: FileCheck %s -check-prefixes=COMMON,NORED
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv8.1m.main-arm-unknown-eabihf"
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@ -162,6 +169,326 @@ for.body: ; preds = %for.body.preheader,
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body, !llvm.loop !14
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}
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define dso_local i32 @i32_add_reduction(i32* noalias nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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; COMMON-LABEL: i32_add_reduction(
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; COMMON: entry:
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; CHECK: @llvm.get.active.lane.mask
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; NORED-NOT: @llvm.get.active.lane.mask
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; COMMON: }
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entry:
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%cmp6 = icmp sgt i32 %N, 0
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br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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br label %for.body
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for.cond.cleanup.loopexit:
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%add.lcssa = phi i32 [ %add, %for.body ]
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br label %for.cond.cleanup
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for.cond.cleanup:
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%S.0.lcssa = phi i32 [ 1, %entry ], [ %add.lcssa, %for.cond.cleanup.loopexit ]
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ret i32 %S.0.lcssa
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for.body:
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%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%S.07 = phi i32 [ %add, %for.body ], [ 1, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %B, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %0, %S.07
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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; Don't tail-fold float reductions.
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;
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define dso_local void @f32_reduction(float* nocapture readonly %Input, i32 %N, float* nocapture %Output) local_unnamed_addr #0 {
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; CHECK-LABEL: f32_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp6 = icmp eq i32 %N, 0
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br i1 %cmp6, label %while.end, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body.preheader, %while.body
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%blkCnt.09 = phi i32 [ %dec, %while.body ], [ %N, %while.body.preheader ]
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%sum.08 = phi float [ %add, %while.body ], [ 0.000000e+00, %while.body.preheader ]
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%Input.addr.07 = phi float* [ %incdec.ptr, %while.body ], [ %Input, %while.body.preheader ]
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%incdec.ptr = getelementptr inbounds float, float* %Input.addr.07, i32 1
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%0 = load float, float* %Input.addr.07, align 4
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%add = fadd fast float %0, %sum.08
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%dec = add i32 %blkCnt.09, -1
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%cmp = icmp eq i32 %dec, 0
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br i1 %cmp, label %while.end.loopexit, label %while.body
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while.end.loopexit: ; preds = %while.body
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%add.lcssa = phi float [ %add, %while.body ]
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br label %while.end
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while.end: ; preds = %while.end.loopexit, %entry
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%sum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add.lcssa, %while.end.loopexit ]
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%conv = uitofp i32 %N to float
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%div = fdiv fast float %sum.0.lcssa, %conv
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store float %div, float* %Output, align 4
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ret void
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}
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; Don't tail-fold float reductions.
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;
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define dso_local void @mixed_f32_i32_reduction(float* nocapture readonly %fInput, i32* nocapture readonly %iInput, i32 %N, float* nocapture %fOutput, i32* nocapture %iOutput) local_unnamed_addr #0 {
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; CHECK-LABEL: mixed_f32_i32_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp15 = icmp eq i32 %N, 0
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br i1 %cmp15, label %while.end, label %while.body.preheader
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while.body.preheader:
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br label %while.body
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while.body:
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%blkCnt.020 = phi i32 [ %dec, %while.body ], [ %N, %while.body.preheader ]
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%isum.019 = phi i32 [ %add2, %while.body ], [ 0, %while.body.preheader ]
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%fsum.018 = phi float [ %add, %while.body ], [ 0.000000e+00, %while.body.preheader ]
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%fInput.addr.017 = phi float* [ %incdec.ptr, %while.body ], [ %fInput, %while.body.preheader ]
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%iInput.addr.016 = phi i32* [ %incdec.ptr1, %while.body ], [ %iInput, %while.body.preheader ]
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%incdec.ptr = getelementptr inbounds float, float* %fInput.addr.017, i32 1
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%incdec.ptr1 = getelementptr inbounds i32, i32* %iInput.addr.016, i32 1
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%0 = load i32, i32* %iInput.addr.016, align 4
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%add2 = add nsw i32 %0, %isum.019
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%1 = load float, float* %fInput.addr.017, align 4
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%add = fadd fast float %1, %fsum.018
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%dec = add i32 %blkCnt.020, -1
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%cmp = icmp eq i32 %dec, 0
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br i1 %cmp, label %while.end.loopexit, label %while.body
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while.end.loopexit:
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%add.lcssa = phi float [ %add, %while.body ]
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%add2.lcssa = phi i32 [ %add2, %while.body ]
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%phitmp = sitofp i32 %add2.lcssa to float
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br label %while.end
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while.end:
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%fsum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %add.lcssa, %while.end.loopexit ]
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%isum.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %phitmp, %while.end.loopexit ]
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%conv = uitofp i32 %N to float
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%div = fdiv fast float %fsum.0.lcssa, %conv
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store float %div, float* %fOutput, align 4
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%div5 = fdiv fast float %isum.0.lcssa, %conv
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%conv6 = fptosi float %div5 to i32
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store i32 %conv6, i32* %iOutput, align 4
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ret void
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}
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define dso_local i32 @i32_mul_reduction(i32* noalias nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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; CHECK-LABEL: i32_mul_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp6 = icmp sgt i32 %N, 0
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br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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br label %for.body
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for.cond.cleanup.loopexit:
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%mul.lcssa = phi i32 [ %mul, %for.body ]
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br label %for.cond.cleanup
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for.cond.cleanup:
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%S.0.lcssa = phi i32 [ 1, %entry ], [ %mul.lcssa, %for.cond.cleanup.loopexit ]
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ret i32 %S.0.lcssa
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for.body:
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%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%S.07 = phi i32 [ %mul, %for.body ], [ 1, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %B, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%mul = mul nsw i32 %0, %S.07
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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define dso_local i32 @i32_or_reduction(i32* noalias nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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; CHECK-LABEL: i32_or_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp6 = icmp sgt i32 %N, 0
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br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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%or.lcssa = phi i32 [ %or, %for.body ]
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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%S.0.lcssa = phi i32 [ 1, %entry ], [ %or.lcssa, %for.cond.cleanup.loopexit ]
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ret i32 %S.0.lcssa
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for.body: ; preds = %for.body.preheader, %for.body
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%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%S.07 = phi i32 [ %or, %for.body ], [ 1, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %B, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%or = or i32 %0, %S.07
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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define dso_local i32 @i32_and_reduction(i32* noalias nocapture readonly %A, i32 %N, i32 %S) local_unnamed_addr #0 {
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; CHECK-LABEL: i32_and_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp5 = icmp sgt i32 %N, 0
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br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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%and.lcssa = phi i32 [ %and, %for.body ]
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br label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
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%S.addr.0.lcssa = phi i32 [ %S, %entry ], [ %and.lcssa, %for.cond.cleanup.loopexit ]
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ret i32 %S.addr.0.lcssa
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for.body: ; preds = %for.body.preheader, %for.body
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%i.07 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%S.addr.06 = phi i32 [ %and, %for.body ], [ %S, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.07
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%0 = load i32, i32* %arrayidx, align 4
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%and = and i32 %0, %S.addr.06
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%inc = add nuw nsw i32 %i.07, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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define i32 @i32_smin_reduction(i32* nocapture readonly %x, i32 %n) #0 {
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; CHECK-LABEL: i32_smin_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %for.body, label %for.cond.cleanup
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for.body: ; preds = %entry, %for.body
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%i.08 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%r.07 = phi i32 [ %add, %for.body ], [ 2147483647, %entry ]
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%arrayidx = getelementptr inbounds i32, i32* %x, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%c = icmp slt i32 %r.07, %0
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%add = select i1 %c, i32 %r.07, i32 %0
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, %n
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%r.0.lcssa = phi i32 [ 2147483647, %entry ], [ %add, %for.body ]
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ret i32 %r.0.lcssa
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}
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define i32 @i32_smax_reduction(i32* nocapture readonly %x, i32 %n) #0 {
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; CHECK-LABEL: i32_smax_reduction(
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; CHECK: vector.body:
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; CHECK-NOT: @llvm.masked.load
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; CHECK-NOT: @llvm.masked.store
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; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
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entry:
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%cmp6 = icmp sgt i32 %n, 0
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br i1 %cmp6, label %for.body, label %for.cond.cleanup
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for.body: ; preds = %entry, %for.body
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%i.08 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%r.07 = phi i32 [ %add, %for.body ], [ -2147483648, %entry ]
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%arrayidx = getelementptr inbounds i32, i32* %x, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%c = icmp sgt i32 %r.07, %0
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%add = select i1 %c, i32 %r.07, i32 %0
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%inc = add nuw nsw i32 %i.08, 1
|
||||
%exitcond = icmp eq i32 %inc, %n
|
||||
br i1 %exitcond, label %for.cond.cleanup, label %for.body
|
||||
|
||||
for.cond.cleanup: ; preds = %for.body, %entry
|
||||
%r.0.lcssa = phi i32 [ -2147483648, %entry ], [ %add, %for.body ]
|
||||
ret i32 %r.0.lcssa
|
||||
}
|
||||
|
||||
define i32 @i32_umin_reduction(i32* nocapture readonly %x, i32 %n) #0 {
|
||||
; CHECK-LABEL: i32_umin_reduction(
|
||||
; CHECK: vector.body:
|
||||
; CHECK-NOT: @llvm.masked.load
|
||||
; CHECK-NOT: @llvm.masked.store
|
||||
; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
|
||||
entry:
|
||||
%cmp6 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp6, label %for.body, label %for.cond.cleanup
|
||||
|
||||
for.body: ; preds = %entry, %for.body
|
||||
%i.08 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
|
||||
%r.07 = phi i32 [ %add, %for.body ], [ 4294967295, %entry ]
|
||||
%arrayidx = getelementptr inbounds i32, i32* %x, i32 %i.08
|
||||
%0 = load i32, i32* %arrayidx, align 4
|
||||
%c = icmp ult i32 %r.07, %0
|
||||
%add = select i1 %c, i32 %r.07, i32 %0
|
||||
%inc = add nuw nsw i32 %i.08, 1
|
||||
%exitcond = icmp eq i32 %inc, %n
|
||||
br i1 %exitcond, label %for.cond.cleanup, label %for.body
|
||||
|
||||
for.cond.cleanup: ; preds = %for.body, %entry
|
||||
%r.0.lcssa = phi i32 [ 4294967295, %entry ], [ %add, %for.body ]
|
||||
ret i32 %r.0.lcssa
|
||||
}
|
||||
|
||||
define i32 @i32_umax_reduction(i32* nocapture readonly %x, i32 %n) #0 {
|
||||
; CHECK-LABEL: i32_umax_reduction(
|
||||
; CHECK: vector.body:
|
||||
; CHECK-NOT: @llvm.masked.load
|
||||
; CHECK-NOT: @llvm.masked.store
|
||||
; CHECK: br i1 %{{.*}}, label {{.*}}, label %vector.body
|
||||
entry:
|
||||
%cmp6 = icmp sgt i32 %n, 0
|
||||
br i1 %cmp6, label %for.body, label %for.cond.cleanup
|
||||
|
||||
for.body: ; preds = %entry, %for.body
|
||||
%i.08 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
|
||||
%r.07 = phi i32 [ %add, %for.body ], [ 0, %entry ]
|
||||
%arrayidx = getelementptr inbounds i32, i32* %x, i32 %i.08
|
||||
%0 = load i32, i32* %arrayidx, align 4
|
||||
%c = icmp ugt i32 %r.07, %0
|
||||
%add = select i1 %c, i32 %r.07, i32 %0
|
||||
%inc = add nuw nsw i32 %i.08, 1
|
||||
%exitcond = icmp eq i32 %inc, %n
|
||||
br i1 %exitcond, label %for.cond.cleanup, label %for.body
|
||||
|
||||
for.cond.cleanup: ; preds = %for.body, %entry
|
||||
%r.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
|
||||
ret i32 %r.0.lcssa
|
||||
}
|
||||
|
||||
; CHECK: !0 = distinct !{!0, !1}
|
||||
; CHECK-NEXT: !1 = !{!"llvm.loop.isvectorized", i32 1}
|
||||
; CHECK-NEXT: !2 = distinct !{!2, !3, !1}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user