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[X86][SSE] Add vselect with zero tests (PR28925)

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llvm-svn: 313529
This commit is contained in:
Simon Pilgrim 2017-09-18 13:32:33 +00:00
parent 2b08de462d
commit e5d95e4259
1 changed files with 67 additions and 0 deletions
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test/CodeGen/X86/vselect-zero.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
; PR28925
define <4 x i32> @test1(<4 x i1> %cond, <4 x i32> %x) {
; SSE2-LABEL: test1:
; SSE2: # BB#0:
; SSE2-NEXT: pslld $31, %xmm0
; SSE2-NEXT: psrad $31, %xmm0
; SSE2-NEXT: pandn %xmm1, %xmm0
; SSE2-NEXT: retq
;
; SSE42-LABEL: test1:
; SSE42: # BB#0:
; SSE42-NEXT: pslld $31, %xmm0
; SSE42-NEXT: xorps %xmm2, %xmm2
; SSE42-NEXT: blendvps %xmm0, %xmm2, %xmm1
; SSE42-NEXT: movaps %xmm1, %xmm0
; SSE42-NEXT: retq
;
; AVX-LABEL: test1:
; AVX: # BB#0:
; AVX-NEXT: vpslld $31, %xmm0, %xmm0
; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm0
; AVX-NEXT: retq
%r = select <4 x i1> %cond, <4 x i32> zeroinitializer, <4 x i32> %x
ret <4 x i32> %r
}
define <4 x i32> @test2(<4 x float> %a, <4 x float> %b, <4 x i32> %x) {
; SSE-LABEL: test2:
; SSE: # BB#0:
; SSE-NEXT: cmpneqps %xmm1, %xmm0
; SSE-NEXT: andps %xmm2, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test2:
; AVX: # BB#0:
; AVX-NEXT: vcmpneqps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0
; AVX-NEXT: retq
%cond = fcmp oeq <4 x float> %a, %b
%r = select <4 x i1> %cond, <4 x i32> zeroinitializer, <4 x i32> %x
ret <4 x i32> %r
}
define float @fsel(float %a, float %b, float %x) {
; SSE-LABEL: fsel:
; SSE: # BB#0:
; SSE-NEXT: cmpeqss %xmm1, %xmm0
; SSE-NEXT: andnps %xmm2, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: fsel:
; AVX: # BB#0:
; AVX-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vandnps %xmm2, %xmm0, %xmm0
; AVX-NEXT: retq
%cond = fcmp oeq float %a, %b
%sel = select i1 %cond, float 0.0, float %x
ret float %sel
}