From e6063ce05b16ac8d90f0aa31c26d633c9f0de675 Mon Sep 17 00:00:00 2001
From: Diana Picus <diana.picus@linaro.org>
Date: Thu, 16 Feb 2017 11:25:09 +0000
Subject: [PATCH] [ARM] GlobalISel: Assert that we don't use the FPR bank if we
 don't have VFP

llvm-svn: 295308
---
 lib/Target/ARM/ARMRegisterBankInfo.cpp            | 12 ++++++++++++
 test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir | 10 ++++++----
 2 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/lib/Target/ARM/ARMRegisterBankInfo.cpp b/lib/Target/ARM/ARMRegisterBankInfo.cpp
index 193a85502e6..f15a8b6cfcc 100644
--- a/lib/Target/ARM/ARMRegisterBankInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterBankInfo.cpp
@@ -13,6 +13,7 @@
 
 #include "ARMRegisterBankInfo.h"
 #include "ARMInstrInfo.h" // For the register classes
+#include "ARMSubtarget.h"
 #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -173,6 +174,17 @@ ARMRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     return InstructionMapping{};
   }
 
+#ifndef NDEBUG
+  for (unsigned i = 0; i < NumOperands; i++) {
+    for (const auto &Mapping : OperandsMapping[i]) {
+      assert(
+          (Mapping.RegBank->getID() != ARM::FPRRegBankID ||
+           MF.getSubtarget<ARMSubtarget>().hasVFP2()) &&
+          "Trying to use floating point register bank on target without vfp");
+    }
+  }
+#endif
+
   return InstructionMapping{DefaultMappingID, /*Cost=*/1, OperandsMapping,
                             NumOperands};
 }
diff --git a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
index cc80634abd1..4ed778a5939 100644
--- a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
+++ b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
@@ -5,12 +5,14 @@
   define void @test_add_s8() { ret void }
   define void @test_add_s1() { ret void }
 
-  define void @test_loads() { ret void }
+  define void @test_loads() #0 { ret void }
 
-  define void @test_fadd_s32() { ret void }
-  define void @test_fadd_s64() { ret void }
+  define void @test_fadd_s32() #0 { ret void }
+  define void @test_fadd_s64() #0 { ret void }
 
-  define void @test_soft_fp_s64() { ret void }
+  define void @test_soft_fp_s64() #0 { ret void }
+
+  attributes #0 = { "target-features"="+vfp2"}
 ...
 ---
 name:            test_add_s32