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[AArch64] Adds memory operands for indexed loads.
This patch adds the memory operands for indexed loads so that certain optimizations can take place. Differential Revision: https://reviews.llvm.org/D100215/ Change-Id: I539fcf046ca4ad1e7df1d893f57d751419d8364d
This commit is contained in:
Stelios Ioannou
parent
235f9f6bf4
commit
e60d182f45
@ -1339,6 +1339,11 @@ bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
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SDValue Ops[] = { Base, Offset, Chain };
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SDNode *Res = CurDAG->getMachineNode(Opcode, dl, MVT::i64, DstVT,
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MVT::Other, Ops);
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// Transfer memoperands.
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MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand();
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CurDAG->setNodeMemRefs(cast<MachineSDNode>(Res), {MemOp});
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// Either way, we're replacing the node, so tell the caller that.
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SDValue LoadedVal = SDValue(Res, 1);
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if (InsertTo64) {
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@ -8,12 +8,11 @@
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define dso_local void @run_test() local_unnamed_addr #0 {
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; CHECK-LABEL: run_test:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #80 // =80
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; CHECK-NEXT: stp d15, d14, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d13, d12, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: stp d11, d10, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: stp d9, d8, [sp, #64] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 80
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; CHECK-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill
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; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 64
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; CHECK-NEXT: .cfi_offset b8, -8
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; CHECK-NEXT: .cfi_offset b9, -16
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; CHECK-NEXT: .cfi_offset b10, -24
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@ -29,7 +28,6 @@ define dso_local void @run_test() local_unnamed_addr #0 {
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; CHECK-NEXT: movi v0.2d, #0000000000000000
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; CHECK-NEXT: add x10, x10, :lo12:B+48
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; CHECK-NEXT: add x11, x11, :lo12:A
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; CHECK-NEXT: str q0, [sp] // 16-byte Folded Spill
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; CHECK-NEXT: // implicit-def: $q1
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; CHECK-NEXT: // implicit-def: $q2
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; CHECK-NEXT: // implicit-def: $q3
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@ -62,102 +60,98 @@ define dso_local void @run_test() local_unnamed_addr #0 {
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; CHECK-NEXT: .LBB0_1: // %for.cond1.preheader
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mov x12, xzr
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; CHECK-NEXT: ldr q15, [x8]
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; CHECK-NEXT: ldr q14, [x12]
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; CHECK-NEXT: ldr q0, [x10], #64
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; CHECK-NEXT: ldr q15, [x8]
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; CHECK-NEXT: ldr x18, [x12]
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; CHECK-NEXT: ldr x0, [x8]
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; CHECK-NEXT: mov x12, v14.d[1]
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; CHECK-NEXT: fmov x13, d14
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; CHECK-NEXT: ldr q14, [x10], #64
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; CHECK-NEXT: fmov x15, d15
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; CHECK-NEXT: mov x14, v15.d[1]
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; CHECK-NEXT: fmov x13, d14
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; CHECK-NEXT: mul x1, x15, x18
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; CHECK-NEXT: mov x16, v0.d[1]
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; CHECK-NEXT: fmov x17, d0
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; CHECK-NEXT: fmov d0, x1
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; CHECK-NEXT: mov x16, v14.d[1]
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; CHECK-NEXT: fmov x17, d14
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; CHECK-NEXT: fmov d14, x1
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; CHECK-NEXT: mul x1, x14, x18
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; CHECK-NEXT: mov x12, v14.d[1]
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; CHECK-NEXT: ldr x0, [x8]
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; CHECK-NEXT: mov v0.d[1], x1
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; CHECK-NEXT: mov v14.d[1], x1
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; CHECK-NEXT: mul x1, x13, x18
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; CHECK-NEXT: add v12.2d, v12.2d, v0.2d
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; CHECK-NEXT: fmov d0, x1
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; CHECK-NEXT: add v12.2d, v12.2d, v14.2d
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; CHECK-NEXT: fmov d14, x1
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; CHECK-NEXT: mul x1, x12, x18
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; CHECK-NEXT: mov v0.d[1], x1
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; CHECK-NEXT: mov v14.d[1], x1
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; CHECK-NEXT: mul x1, x17, x18
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; CHECK-NEXT: add v13.2d, v13.2d, v0.2d
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; CHECK-NEXT: add v11.2d, v11.2d, v0.2d
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; CHECK-NEXT: fmov d0, x1
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; CHECK-NEXT: add v13.2d, v13.2d, v14.2d
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; CHECK-NEXT: add v11.2d, v11.2d, v14.2d
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; CHECK-NEXT: fmov d14, x1
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; CHECK-NEXT: mul x18, x16, x18
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; CHECK-NEXT: ldr q14, [sp] // 16-byte Folded Reload
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; CHECK-NEXT: mov v0.d[1], x18
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; CHECK-NEXT: mov v14.d[1], x18
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; CHECK-NEXT: mul x18, x15, x0
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; CHECK-NEXT: add x1, x11, x8
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; CHECK-NEXT: add v10.2d, v10.2d, v0.2d
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; CHECK-NEXT: fmov d0, x18
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; CHECK-NEXT: add v10.2d, v10.2d, v14.2d
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; CHECK-NEXT: fmov d14, x18
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; CHECK-NEXT: mul x18, x14, x0
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; CHECK-NEXT: ldr x1, [x1, #128]
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; CHECK-NEXT: mov v0.d[1], x18
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; CHECK-NEXT: mov v14.d[1], x18
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; CHECK-NEXT: mul x18, x13, x0
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; CHECK-NEXT: add v8.2d, v8.2d, v0.2d
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; CHECK-NEXT: add v25.2d, v25.2d, v0.2d
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; CHECK-NEXT: add v22.2d, v22.2d, v0.2d
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; CHECK-NEXT: add v18.2d, v18.2d, v0.2d
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; CHECK-NEXT: add v6.2d, v6.2d, v0.2d
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; CHECK-NEXT: add v14.2d, v14.2d, v0.2d
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; CHECK-NEXT: fmov d0, x18
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; CHECK-NEXT: add v8.2d, v8.2d, v14.2d
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; CHECK-NEXT: add v25.2d, v25.2d, v14.2d
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; CHECK-NEXT: add v22.2d, v22.2d, v14.2d
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; CHECK-NEXT: add v18.2d, v18.2d, v14.2d
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; CHECK-NEXT: add v6.2d, v6.2d, v14.2d
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; CHECK-NEXT: add v0.2d, v0.2d, v14.2d
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; CHECK-NEXT: fmov d14, x18
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; CHECK-NEXT: mul x18, x12, x0
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; CHECK-NEXT: mov v0.d[1], x18
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; CHECK-NEXT: mov v14.d[1], x18
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; CHECK-NEXT: mul x18, x17, x0
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; CHECK-NEXT: mul x0, x16, x0
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; CHECK-NEXT: add v9.2d, v9.2d, v0.2d
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; CHECK-NEXT: add v31.2d, v31.2d, v0.2d
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; CHECK-NEXT: add v26.2d, v26.2d, v0.2d
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; CHECK-NEXT: add v23.2d, v23.2d, v0.2d
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; CHECK-NEXT: add v21.2d, v21.2d, v0.2d
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; CHECK-NEXT: add v19.2d, v19.2d, v0.2d
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; CHECK-NEXT: add v17.2d, v17.2d, v0.2d
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; CHECK-NEXT: add v7.2d, v7.2d, v0.2d
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; CHECK-NEXT: add v5.2d, v5.2d, v0.2d
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; CHECK-NEXT: add v3.2d, v3.2d, v0.2d
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; CHECK-NEXT: add v2.2d, v2.2d, v0.2d
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; CHECK-NEXT: fmov d0, x18
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; CHECK-NEXT: add v9.2d, v9.2d, v14.2d
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; CHECK-NEXT: add v31.2d, v31.2d, v14.2d
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; CHECK-NEXT: add v26.2d, v26.2d, v14.2d
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; CHECK-NEXT: add v23.2d, v23.2d, v14.2d
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; CHECK-NEXT: add v21.2d, v21.2d, v14.2d
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; CHECK-NEXT: add v19.2d, v19.2d, v14.2d
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; CHECK-NEXT: add v17.2d, v17.2d, v14.2d
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; CHECK-NEXT: add v7.2d, v7.2d, v14.2d
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; CHECK-NEXT: add v5.2d, v5.2d, v14.2d
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; CHECK-NEXT: add v3.2d, v3.2d, v14.2d
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; CHECK-NEXT: add v2.2d, v2.2d, v14.2d
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; CHECK-NEXT: fmov d14, x18
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; CHECK-NEXT: mul x15, x15, x1
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; CHECK-NEXT: mov v0.d[1], x0
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; CHECK-NEXT: mov v14.d[1], x0
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; CHECK-NEXT: mul x14, x14, x1
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; CHECK-NEXT: add v30.2d, v30.2d, v0.2d
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; CHECK-NEXT: add v24.2d, v24.2d, v0.2d
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; CHECK-NEXT: add v20.2d, v20.2d, v0.2d
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; CHECK-NEXT: add v16.2d, v16.2d, v0.2d
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; CHECK-NEXT: add v4.2d, v4.2d, v0.2d
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; CHECK-NEXT: add v1.2d, v1.2d, v0.2d
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; CHECK-NEXT: fmov d0, x15
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; CHECK-NEXT: add v30.2d, v30.2d, v14.2d
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; CHECK-NEXT: add v24.2d, v24.2d, v14.2d
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; CHECK-NEXT: add v20.2d, v20.2d, v14.2d
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; CHECK-NEXT: add v16.2d, v16.2d, v14.2d
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; CHECK-NEXT: add v4.2d, v4.2d, v14.2d
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; CHECK-NEXT: add v1.2d, v1.2d, v14.2d
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; CHECK-NEXT: fmov d14, x15
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; CHECK-NEXT: mul x13, x13, x1
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; CHECK-NEXT: mov v0.d[1], x14
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; CHECK-NEXT: mov v14.d[1], x14
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; CHECK-NEXT: mul x12, x12, x1
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; CHECK-NEXT: add v29.2d, v29.2d, v0.2d
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; CHECK-NEXT: fmov d0, x13
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; CHECK-NEXT: add v29.2d, v29.2d, v14.2d
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; CHECK-NEXT: fmov d14, x13
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; CHECK-NEXT: mul x17, x17, x1
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; CHECK-NEXT: mov v0.d[1], x12
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; CHECK-NEXT: mov v14.d[1], x12
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; CHECK-NEXT: mul x16, x16, x1
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; CHECK-NEXT: add v28.2d, v28.2d, v0.2d
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; CHECK-NEXT: fmov d0, x17
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; CHECK-NEXT: mov v0.d[1], x16
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; CHECK-NEXT: add v28.2d, v28.2d, v14.2d
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; CHECK-NEXT: fmov d14, x17
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; CHECK-NEXT: mov v14.d[1], x16
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; CHECK-NEXT: add x8, x8, #8 // =8
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; CHECK-NEXT: add v27.2d, v27.2d, v0.2d
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; CHECK-NEXT: add v27.2d, v27.2d, v14.2d
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; CHECK-NEXT: cmp x8, #64 // =64
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; CHECK-NEXT: add x9, x9, #1 // =1
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; CHECK-NEXT: str q14, [sp] // 16-byte Folded Spill
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; CHECK-NEXT: b.ne .LBB0_1
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; CHECK-NEXT: // %bb.2: // %for.cond.cleanup
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; CHECK-NEXT: adrp x8, C
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; CHECK-NEXT: add x8, x8, :lo12:C
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; CHECK-NEXT: ldr q0, [sp] // 16-byte Folded Reload
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; CHECK-NEXT: stp q13, q12, [x8]
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; CHECK-NEXT: stp q11, q10, [x8, #32]
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; CHECK-NEXT: stp q9, q8, [x8, #64]
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; CHECK-NEXT: ldp d9, d8, [sp, #64] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d11, d10, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d13, d12, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d15, d14, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: stp q31, q30, [x8, #96]
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; CHECK-NEXT: stp q29, q28, [x8, #144]
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; CHECK-NEXT: stp q27, q26, [x8, #176]
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@ -171,7 +165,7 @@ define dso_local void @run_test() local_unnamed_addr #0 {
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; CHECK-NEXT: stp q4, q3, [x8, #432]
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; CHECK-NEXT: stp q0, q2, [x8, #464]
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; CHECK-NEXT: str q1, [x8, #496]
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; CHECK-NEXT: add sp, sp, #80 // =80
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; CHECK-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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br label %for.cond1.preheader
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