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[InstCombine] remove fold of an icmp pattern that should never happen
While removing a scalar shackle from an icmp fold, I noticed that I couldn't find any tests to trigger this code path. The 'and' shrinking transform should be handled by InstCombiner::foldCastedBitwiseLogic() or eliminated with InstSimplify. The icmp narrowing is part of InstCombiner::foldICmpWithCastAndCast(). Differential Revision: https://reviews.llvm.org/D24031 llvm-svn: 280370
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@ -1526,21 +1526,6 @@ Instruction *InstCombiner::foldICmpAndConstConst(ICmpInst &Cmp,
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}
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}
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// If the LHS is an AND of a zext, and we have an equality compare, we can
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// shrink the and/compare to the smaller type, eliminating the cast.
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if (ZExtInst *Cast = dyn_cast<ZExtInst>(And->getOperand(0))) {
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IntegerType *Ty = cast<IntegerType>(Cast->getSrcTy());
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// Make sure we don't compare the upper bits, SimplifyDemandedBits
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// should fold the icmp to true/false in that case.
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if (Cmp.isEquality() && C1->getActiveBits() <= Ty->getBitWidth()) {
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Value *NewAnd = Builder->CreateAnd(Cast->getOperand(0),
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ConstantExpr::getTrunc(C2, Ty));
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NewAnd->takeName(And);
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return new ICmpInst(Cmp.getPredicate(), NewAnd,
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ConstantExpr::getTrunc(RHS, Ty));
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}
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}
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if (Instruction *I = foldICmpAndShift(Cmp, And, C1))
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return I;
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@ -371,6 +371,21 @@ define <2 x i1> @test31vec(<2 x i64> %A) {
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ret <2 x i1> %D
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}
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; Verify that the 'and' was narrowed, the zext was eliminated, and the compare was narrowed
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; even for vectors. Earlier folds should ensure that the icmp(and(zext)) pattern never occurs.
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define <2 x i1> @test32vec(<2 x i8> %A) {
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; CHECK-LABEL: @test32vec(
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; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> %A, <i8 42, i8 42>
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; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 10, i8 10>
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%B = zext <2 x i8> %A to <2 x i16>
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%C = and <2 x i16> %B, <i16 42, i16 42>
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%D = icmp eq <2 x i16> %C, <i16 10, i16 10>
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ret <2 x i1> %D
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}
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define i32 @test33(i32 %c1) {
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; CHECK-LABEL: @test33(
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; CHECK-NEXT: ret i32 %c1
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