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Correctly handle a one-word struct passed byval on x86_64.
rdar://problem/6920088 llvm-svn: 132105
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@ -48,8 +48,13 @@ void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
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if (MinAlign > (int)Align)
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Align = MinAlign;
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TM.getTargetLowering()->HandleByVal(const_cast<CCState*>(this), Size);
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unsigned Offset = AllocateStack(Size, Align);
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addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
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if (Size) {
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unsigned Offset = AllocateStack(Size, Align);
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addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
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} else {
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addLoc(CCValAssign::getReg(ValNo, ValVT, getFirstByValReg(), LocVT,
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LocInfo));
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}
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}
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/// MarkAllocated - Mark a register and all of its aliases as allocated.
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@ -2091,28 +2091,54 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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}
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if (VA.isRegLoc()) {
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RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
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if (isVarArg && IsWin64) {
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// Win64 ABI requires argument XMM reg to be copied to the corresponding
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// shadow reg if callee is a varargs function.
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unsigned ShadowReg = 0;
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switch (VA.getLocReg()) {
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case X86::XMM0: ShadowReg = X86::RCX; break;
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case X86::XMM1: ShadowReg = X86::RDX; break;
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case X86::XMM2: ShadowReg = X86::R8; break;
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case X86::XMM3: ShadowReg = X86::R9; break;
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if (isByVal) {
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if (CCInfo.isFirstByValRegValid()) {
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EVT PtrVT = DAG.getTargetLoweringInfo().getPointerTy();
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unsigned reg = CCInfo.getFirstByValReg();
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SDValue Load = DAG.getLoad(PtrVT, dl, Chain, Arg,
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MachinePointerInfo(),
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false, false, 0);
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MemOpChains.push_back(Load.getValue(1));
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RegsToPass.push_back(std::make_pair(reg, Load));
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if (Flags.getByValSize() > 8) {
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SDValue Const8 = DAG.getConstant(8, MVT::i32);
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SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const8);
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SDValue Load2 = DAG.getLoad(PtrVT, dl, Chain, AddArg,
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MachinePointerInfo(),
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false, false, 0);
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MemOpChains.push_back(Load.getValue(1));
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RegsToPass.push_back(std::make_pair(reg+1, Load));
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}
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CCInfo.clearFirstByValReg();
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}
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} else {
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// Usual case:
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RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
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if (isVarArg && IsWin64) {
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// Win64 ABI requires argument XMM reg to be copied to the corresponding
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// shadow reg if callee is a varargs function.
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unsigned ShadowReg = 0;
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switch (VA.getLocReg()) {
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case X86::XMM0: ShadowReg = X86::RCX; break;
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case X86::XMM1: ShadowReg = X86::RDX; break;
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case X86::XMM2: ShadowReg = X86::R8; break;
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case X86::XMM3: ShadowReg = X86::R9; break;
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}
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if (ShadowReg)
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RegsToPass.push_back(std::make_pair(ShadowReg, Arg));
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}
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if (ShadowReg)
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RegsToPass.push_back(std::make_pair(ShadowReg, Arg));
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}
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} else if (!IsSibcall && (!isTailCall || isByVal)) {
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if (isByVal) { // In memory.
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// ??
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}
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assert(VA.isMemLoc());
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if (StackPtr.getNode() == 0)
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StackPtr = DAG.getCopyFromReg(Chain, dl, X86StackPtr, getPointerTy());
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MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg,
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dl, DAG, VA, Flags));
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}
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}
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} // end for (all register/memloc assignments)
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if (!MemOpChains.empty())
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Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
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@ -2438,6 +2464,39 @@ X86TargetLowering::GetAlignedArgumentStackSize(unsigned StackSize,
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return Offset;
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}
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/// HandleByVal - Every parameter *after* a byval parameter is passed
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/// on the stack. Remember the next parameter register to allocate,
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/// and then confiscate the rest of the parameter registers to insure
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/// this.
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void
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llvm::X86TargetLowering::HandleByVal(CCState *State, unsigned &size) const {
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if (!Subtarget->is64Bit())
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return;
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if (size == 0 || size > 16)
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return;
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int RegsRequired = (size > 8) ? 2 : 1;
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static const unsigned GPR64ArgRegs64Bit[] = {
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X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
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};
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unsigned NextRegToAlloc = State->getFirstUnallocated(GPR64ArgRegs64Bit, 6);
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// If insufficient registers available
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if (NextRegToAlloc + RegsRequired > 6)
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return;
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size = 0; // Tell caller not to allocate stack.
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unsigned reg = State->AllocateReg(GPR64ArgRegs64Bit, 6);
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State->setFirstByValReg(reg);
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if (RegsRequired == 2) {
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State->AllocateReg(GPR64ArgRegs64Bit, 6);
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}
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}
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/// MatchingStackOffset - Return true if the given stack call argument is
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/// already available in the same position (relatively) of the caller's
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/// incoming argument stack.
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@ -816,6 +816,8 @@ namespace llvm {
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// Utility functions to help LowerVECTOR_SHUFFLE
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SDValue LowerVECTOR_SHUFFLEv8i16(SDValue Op, SelectionDAG &DAG) const;
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void HandleByVal(CCState *, unsigned &) const;
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virtual SDValue
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LowerFormalArguments(SDValue Chain,
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CallingConv::ID CallConv, bool isVarArg,
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35
test/CodeGen/X86/2011-05-18-byval-in-reg.ll
Normal file
35
test/CodeGen/X86/2011-05-18-byval-in-reg.ll
Normal file
@ -0,0 +1,35 @@
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; RUN: llc < %s | FileCheck %s
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; rdar://problem/6920088
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;target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "x86_64-apple-darwin9.0"
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@"\01LC" = internal constant [2 x i8] c"a\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC1" = internal constant [2 x i8] c"b\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC2" = internal constant [2 x i8] c"c\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC3" = internal constant [2 x i8] c"d\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC4" = internal constant [2 x i8] c"e\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC5" = internal constant [2 x i8] c"f\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC6" = internal constant [2 x i8] c"g\00" ; <[2 x i8]*> [#uses=1]
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@"\01LC7" = internal constant [4 x i8] c"%s\0A\00" ; <[4 x i8]*> [#uses=1]
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define i32 @main(i32 %argc, i8** %argv) nounwind {
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entry:
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%tmp = alloca i8* ; <i8**> [#uses=2]
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%tmp1 = alloca i8* ; <i8**> [#uses=2]
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%tmp2 = alloca i8* ; <i8**> [#uses=2]
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; CHECK: leaq LC4(%rip), [[AREG:%[a-z]+]]
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; CHECK-NEXT: movq [[AREG]], [[STKOFF:[0-9]+]](%rsp)
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store i8* getelementptr ([2 x i8]* @"\01LC4", i32 0, i32 0), i8** %tmp
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store i8* getelementptr ([2 x i8]* @"\01LC5", i32 0, i32 0), i8** %tmp1
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store i8* getelementptr ([2 x i8]* @"\01LC6", i32 0, i32 0), i8** %tmp2
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; The LC4 struct should be passed in %r9:
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; CHECK: movq [[STKOFF]](%rsp), %r9
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call void (i8**, ...)* @generate_password(i8** null,
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i8* getelementptr ([2 x i8]* @"\01LC", i32 0, i32 0),
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i8* getelementptr ([2 x i8]* @"\01LC1", i32 0, i32 0),
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i8* getelementptr ([2 x i8]* @"\01LC2", i32 0, i32 0),
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i8* getelementptr ([2 x i8]* @"\01LC3", i32 0, i32 0),
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i8** byval %tmp, i8** byval %tmp1, i8** byval %tmp2)
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ret i32 0
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}
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declare void @generate_password(i8** %pw, ...) nounwind
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