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Don't forego folding of loads into 64-bit adds when the other
operand is a signed 32-bit immediate. Unlike with the 8-bit signed immediate case, it isn't actually smaller to fold a 32-bit signed immediate instead of a load. In fact, it's larger in the case of 32-bit unsigned immediates, because they can be materialized with movl instead of movq. llvm-svn: 67001
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@ -319,16 +319,9 @@ bool X86DAGToDAGISel::IsLegalAndProfitableToFold(SDNode *N, SDNode *U,
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// addl 4(%esp), %eax
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// The former is 2 bytes shorter. In case where the increment is 1, then
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// the saving can be 4 bytes (by using incl %eax).
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ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(U->getOperand(1));
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if (Imm) {
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if (U->getValueType(0) == MVT::i64) {
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if ((int32_t)Imm->getZExtValue() == (int64_t)Imm->getZExtValue())
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return false;
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} else {
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if ((int8_t)Imm->getZExtValue() == (int64_t)Imm->getZExtValue())
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return false;
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}
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}
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if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(U->getOperand(1)))
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if (Imm->getAPIntValue().isSignedIntN(8))
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return false;
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}
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}
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