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[LegalizeDAG] Assert non-power-of-2 load/store op splits are in range. NFCI.

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Fixes static analyzer undefined/out-of-range shift warnings.

llvm-svn: 360245
This commit is contained in:
Simon Pilgrim 2019-05-08 11:22:10 +00:00
parent 2409665397
commit e7737fff32
1 changed files with 6 additions and 2 deletions
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8
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -539,7 +539,9 @@ void SelectionDAGLegalize::LegalizeStoreOps(SDNode *Node) {
} else if (StWidth & (StWidth - 1)) {
// If not storing a power-of-2 number of bits, expand as two stores.
assert(!StVT.isVector() && "Unsupported truncstore!");
unsigned RoundWidth = 1 << Log2_32(StWidth);
unsigned LogStWidth = Log2_32(StWidth);
assert(LogStWidth < 32);
unsigned RoundWidth = 1 << LogStWidth;
assert(RoundWidth < StWidth);
unsigned ExtraWidth = StWidth - RoundWidth;
assert(ExtraWidth < RoundWidth);
@ -753,7 +755,9 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
} else if (SrcWidth & (SrcWidth - 1)) {
// If not loading a power-of-2 number of bits, expand as two loads.
assert(!SrcVT.isVector() && "Unsupported extload!");
unsigned RoundWidth = 1 << Log2_32(SrcWidth);
unsigned LogSrcWidth = Log2_32(SrcWidth);
assert(LogSrcWidth < 32);
unsigned RoundWidth = 1 << LogSrcWidth;
assert(RoundWidth < SrcWidth);
unsigned ExtraWidth = SrcWidth - RoundWidth;
assert(ExtraWidth < RoundWidth);