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[llvm] Use llvm::all_of (NFC)
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@ -124,15 +124,13 @@ bool IRSimilarity::isClose(const IRInstructionData &A,
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auto ZippedOperands = zip(GEP->indices(), OtherGEP->indices());
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auto ZIt = ZippedOperands.begin();
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// We increment here since we do not care about the first instruction,
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// we only care about the following operands since they must be the
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// exact same to be considered similar.
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return std::all_of(++ZIt, ZippedOperands.end(),
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[](std::tuple<llvm::Use &, llvm::Use &> R) {
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return std::get<0>(R) == std::get<1>(R);
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});
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return all_of(drop_begin(ZippedOperands),
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[](std::tuple<llvm::Use &, llvm::Use &> R) {
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return std::get<0>(R) == std::get<1>(R);
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});
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}
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// If the instructions are functions, we make sure that the function name is
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@ -1005,16 +1005,15 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
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}
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case TargetOpcode::G_PHI: {
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LLT DstTy = MRI->getType(MI->getOperand(0).getReg());
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if (!DstTy.isValid() ||
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!std::all_of(MI->operands_begin() + 1, MI->operands_end(),
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[this, &DstTy](const MachineOperand &MO) {
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if (!MO.isReg())
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return true;
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LLT Ty = MRI->getType(MO.getReg());
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if (!Ty.isValid() || (Ty != DstTy))
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return false;
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return true;
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}))
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if (!DstTy.isValid() || !all_of(drop_begin(MI->operands()),
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[this, &DstTy](const MachineOperand &MO) {
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if (!MO.isReg())
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return true;
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LLT Ty = MRI->getType(MO.getReg());
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if (!Ty.isValid() || (Ty != DstTy))
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return false;
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return true;
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}))
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report("Generic Instruction G_PHI has operands with incompatible/missing "
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"types",
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MI);
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@ -19452,9 +19452,8 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
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return DAG.getUNDEF(VT);
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// Optimize concat_vectors where all but the first of the vectors are undef.
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if (std::all_of(std::next(N->op_begin()), N->op_end(), [](const SDValue &Op) {
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return Op.isUndef();
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})) {
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if (all_of(drop_begin(N->ops()),
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[](const SDValue &Op) { return Op.isUndef(); })) {
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SDValue In = N->getOperand(0);
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assert(In.getValueType().isVector() && "Must concat vectors");
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@ -21441,11 +21440,10 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) {
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// Make sure all but the first op are undef or constant.
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auto ConcatWithConstantOrUndef = [](SDValue Concat) {
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return Concat.getOpcode() == ISD::CONCAT_VECTORS &&
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std::all_of(std::next(Concat->op_begin()), Concat->op_end(),
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[](const SDValue &Op) {
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return Op.isUndef() ||
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ISD::isBuildVectorOfConstantSDNodes(Op.getNode());
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});
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all_of(drop_begin(Concat->ops()), [](const SDValue &Op) {
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return Op.isUndef() ||
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ISD::isBuildVectorOfConstantSDNodes(Op.getNode());
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});
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};
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// The following pattern is likely to emerge with vector reduction ops. Moving
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@ -589,8 +589,8 @@ StringRef demanglePE32ExternCFunc(StringRef SymbolName) {
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if (Front != '?') {
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size_t AtPos = SymbolName.rfind('@');
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if (AtPos != StringRef::npos &&
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std::all_of(SymbolName.begin() + AtPos + 1, SymbolName.end(),
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[](char C) { return C >= '0' && C <= '9'; })) {
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all_of(drop_begin(SymbolName, AtPos + 1),
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[](char C) { return C >= '0' && C <= '9'; })) {
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SymbolName = SymbolName.substr(0, AtPos);
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}
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}
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@ -698,9 +698,7 @@ bool GuardWideningImpl::combineRangeChecks(
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return (HighOffset - RC.getOffsetValue()).ult(MaxDiff);
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};
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if (MaxDiff.isMinValue() ||
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!std::all_of(std::next(CurrentChecks.begin()), CurrentChecks.end(),
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OffsetOK))
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if (MaxDiff.isMinValue() || !all_of(drop_begin(CurrentChecks), OffsetOK))
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return false;
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// We have a series of f+1 checks as:
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@ -692,11 +692,9 @@ static bool unswitchTrivialSwitch(Loop &L, SwitchInst &SI, DominatorTree &DT,
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// successor.
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BasicBlock *CommonSuccBB = nullptr;
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if (SI.getNumCases() > 0 &&
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std::all_of(std::next(SI.case_begin()), SI.case_end(),
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[&SI](const SwitchInst::CaseHandle &Case) {
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return Case.getCaseSuccessor() ==
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SI.case_begin()->getCaseSuccessor();
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}))
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all_of(drop_begin(SI.cases()), [&SI](const SwitchInst::CaseHandle &Case) {
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return Case.getCaseSuccessor() == SI.case_begin()->getCaseSuccessor();
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}))
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CommonSuccBB = SI.case_begin()->getCaseSuccessor();
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if (!DefaultExitBB) {
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// If we're not unswitching the default, we need it to match any cases to
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