RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

Sort the register list based on the *actual* register numbers rather than the

Browse Source 
enum values we give to them. <rdar://problem/8823730>

llvm-svn: 123321
This commit is contained in:
Bill Wendling 2011-01-12 21:20:59 +00:00
parent 52db9b4821
commit e82361731d
2 changed files with 13 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -583,15 +583,15 @@ ParseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
SmallVectorImpl<std::pair<unsigned, SMLoc> >::const_iterator
RI = Registers.begin(), RE = Registers.end();
DenseMap<unsigned, bool> RegMap;
RegMap[RI->first] = true;
unsigned HighRegNum = RI->first;
unsigned HighRegNum = getARMRegisterNumbering(RI->first);
bool EmittedWarning = false;
DenseMap<unsigned, bool> RegMap;
RegMap[HighRegNum] = true;
for (++RI; RI != RE; ++RI) {
const std::pair<unsigned, SMLoc> &RegInfo = *RI;
unsigned Reg = RegInfo.first;
unsigned Reg = getARMRegisterNumbering(RegInfo.first);
if (RegMap[Reg]) {
Error(RegInfo.second, "register duplicated in register list");

8
test/MC/ARM/reg-list.s Normal file
View File

@ -0,0 +1,8 @@
@ RUN: llvm-mc -triple thumb-apple-darwin10 -show-encoding < %s 2> %t | FileCheck %s
@ RUN: FileCheck --check-prefix=CHECK-WARNINGS < %t %s
push {r7, lr}
@ CHECK-WARNINGS: register not in ascending order in register list
push {lr, r7}
@ CHECK: push {lr, r7}