1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 20:23:11 +01:00

Sink DebugLoc handling out of SelectionDAGISel into FastISel and

SelectionDAGBuilder, where it doesn't have to be as complicated.

llvm-svn: 101848
This commit is contained in:
Dan Gohman 2010-04-20 00:48:35 +00:00
parent 2f4001f3a8
commit e8387b1250
5 changed files with 15 additions and 44 deletions

View File

@ -75,11 +75,6 @@ public:
MBB = mbb;
}
/// setCurDebugLoc - Set the current debug location information, which is used
/// when creating a machine instruction.
///
void setCurDebugLoc(DebugLoc dl) { DL = dl; }
/// getCurDebugLoc() - Return current debug location information.
DebugLoc getCurDebugLoc() const { return DL; }

View File

@ -552,14 +552,21 @@ bool FastISel::SelectBitCast(const User *I) {
bool
FastISel::SelectInstruction(const Instruction *I) {
DL = I->getDebugLoc();
// First, try doing target-independent selection.
if (SelectOperator(I, I->getOpcode()))
if (SelectOperator(I, I->getOpcode())) {
DL = DebugLoc();
return true;
}
// Next, try calling the target to attempt to handle the instruction.
if (TargetSelectInstruction(I))
if (TargetSelectInstruction(I)) {
DL = DebugLoc();
return true;
}
DL = DebugLoc();
return false;
}

View File

@ -614,7 +614,11 @@ void SelectionDAGBuilder::AssignOrderingToNode(const SDNode *Node) {
}
void SelectionDAGBuilder::visit(const Instruction &I) {
CurDebugLoc = I.getDebugLoc();
visit(I.getOpcode(), I);
CurDebugLoc = DebugLoc();
}
void SelectionDAGBuilder::visit(unsigned Opcode, const User &I) {

View File

@ -333,7 +333,6 @@ public:
SDValue getControlRoot();
DebugLoc getCurDebugLoc() const { return CurDebugLoc; }
void setCurDebugLoc(DebugLoc dl) { CurDebugLoc = dl; }
unsigned getSDNodeOrder() const { return SDNodeOrder; }

View File

@ -224,26 +224,6 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
return true;
}
/// SetDebugLoc - Update MF's and SDB's DebugLocs if debug information is
/// attached with this instruction.
static void SetDebugLoc(const Instruction *I, SelectionDAGBuilder *SDB,
FastISel *FastIS, MachineFunction *MF) {
DebugLoc DL = I->getDebugLoc();
if (DL.isUnknown()) return;
SDB->setCurDebugLoc(DL);
if (FastIS)
FastIS->setCurDebugLoc(DL);
}
/// ResetDebugLoc - Set MF's and SDB's DebugLocs to Unknown.
static void ResetDebugLoc(SelectionDAGBuilder *SDB, FastISel *FastIS) {
SDB->setCurDebugLoc(DebugLoc());
if (FastIS)
FastIS->setCurDebugLoc(DebugLoc());
}
MachineBasicBlock *
SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
const BasicBlock *LLVMBB,
@ -255,11 +235,8 @@ SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
// are handled below.
for (BasicBlock::const_iterator I = Begin;
I != End && !SDB->HasTailCall && !isa<TerminatorInst>(I);
++I) {
SetDebugLoc(I, SDB, 0, MF);
++I)
SDB->visit(*I);
ResetDebugLoc(SDB, 0);
}
if (!SDB->HasTailCall) {
// Ensure that all instructions which are used outside of their defining
@ -273,9 +250,7 @@ SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
HandlePHINodesInSuccessorBlocks(LLVMBB);
// Lower the terminator after the copies are emitted.
SetDebugLoc(LLVMBB->getTerminator(), SDB, 0, MF);
SDB->visit(*LLVMBB->getTerminator());
ResetDebugLoc(SDB, 0);
}
}
@ -800,7 +775,6 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
if (isa<TerminatorInst>(BI))
if (!HandlePHINodesInSuccessorBlocksFast(LLVMBB, FastIS)) {
++NumFastIselFailures;
ResetDebugLoc(SDB, FastIS);
if (EnableFastISelVerbose || EnableFastISelAbort) {
dbgs() << "FastISel miss: ";
BI->dump();
@ -810,17 +784,9 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
break;
}
SetDebugLoc(BI, SDB, FastIS, MF);
// Try to select the instruction with FastISel.
if (FastIS->SelectInstruction(BI)) {
ResetDebugLoc(SDB, FastIS);
if (FastIS->SelectInstruction(BI))
continue;
}
// Clear out the debug location so that it doesn't carry over to
// unrelated instructions.
ResetDebugLoc(SDB, FastIS);
// Then handle certain instructions as single-LLVM-Instruction blocks.
if (isa<CallInst>(BI)) {