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Sink DebugLoc handling out of SelectionDAGISel into FastISel and
SelectionDAGBuilder, where it doesn't have to be as complicated. llvm-svn: 101848
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@ -75,11 +75,6 @@ public:
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MBB = mbb;
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}
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/// setCurDebugLoc - Set the current debug location information, which is used
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/// when creating a machine instruction.
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///
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void setCurDebugLoc(DebugLoc dl) { DL = dl; }
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/// getCurDebugLoc() - Return current debug location information.
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DebugLoc getCurDebugLoc() const { return DL; }
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@ -552,14 +552,21 @@ bool FastISel::SelectBitCast(const User *I) {
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bool
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FastISel::SelectInstruction(const Instruction *I) {
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DL = I->getDebugLoc();
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// First, try doing target-independent selection.
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if (SelectOperator(I, I->getOpcode()))
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if (SelectOperator(I, I->getOpcode())) {
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DL = DebugLoc();
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return true;
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}
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// Next, try calling the target to attempt to handle the instruction.
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if (TargetSelectInstruction(I))
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if (TargetSelectInstruction(I)) {
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DL = DebugLoc();
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return true;
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}
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DL = DebugLoc();
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return false;
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}
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@ -614,7 +614,11 @@ void SelectionDAGBuilder::AssignOrderingToNode(const SDNode *Node) {
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}
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void SelectionDAGBuilder::visit(const Instruction &I) {
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CurDebugLoc = I.getDebugLoc();
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visit(I.getOpcode(), I);
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CurDebugLoc = DebugLoc();
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}
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void SelectionDAGBuilder::visit(unsigned Opcode, const User &I) {
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@ -333,7 +333,6 @@ public:
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SDValue getControlRoot();
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DebugLoc getCurDebugLoc() const { return CurDebugLoc; }
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void setCurDebugLoc(DebugLoc dl) { CurDebugLoc = dl; }
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unsigned getSDNodeOrder() const { return SDNodeOrder; }
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@ -224,26 +224,6 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
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return true;
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}
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/// SetDebugLoc - Update MF's and SDB's DebugLocs if debug information is
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/// attached with this instruction.
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static void SetDebugLoc(const Instruction *I, SelectionDAGBuilder *SDB,
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FastISel *FastIS, MachineFunction *MF) {
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DebugLoc DL = I->getDebugLoc();
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if (DL.isUnknown()) return;
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SDB->setCurDebugLoc(DL);
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if (FastIS)
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FastIS->setCurDebugLoc(DL);
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}
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/// ResetDebugLoc - Set MF's and SDB's DebugLocs to Unknown.
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static void ResetDebugLoc(SelectionDAGBuilder *SDB, FastISel *FastIS) {
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SDB->setCurDebugLoc(DebugLoc());
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if (FastIS)
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FastIS->setCurDebugLoc(DebugLoc());
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}
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MachineBasicBlock *
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SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
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const BasicBlock *LLVMBB,
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@ -255,11 +235,8 @@ SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
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// are handled below.
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for (BasicBlock::const_iterator I = Begin;
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I != End && !SDB->HasTailCall && !isa<TerminatorInst>(I);
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++I) {
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SetDebugLoc(I, SDB, 0, MF);
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++I)
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SDB->visit(*I);
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ResetDebugLoc(SDB, 0);
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}
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if (!SDB->HasTailCall) {
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// Ensure that all instructions which are used outside of their defining
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@ -273,9 +250,7 @@ SelectionDAGISel::SelectBasicBlock(MachineBasicBlock *BB,
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HandlePHINodesInSuccessorBlocks(LLVMBB);
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// Lower the terminator after the copies are emitted.
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SetDebugLoc(LLVMBB->getTerminator(), SDB, 0, MF);
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SDB->visit(*LLVMBB->getTerminator());
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ResetDebugLoc(SDB, 0);
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}
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}
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@ -800,7 +775,6 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
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if (isa<TerminatorInst>(BI))
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if (!HandlePHINodesInSuccessorBlocksFast(LLVMBB, FastIS)) {
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++NumFastIselFailures;
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ResetDebugLoc(SDB, FastIS);
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if (EnableFastISelVerbose || EnableFastISelAbort) {
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dbgs() << "FastISel miss: ";
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BI->dump();
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@ -810,17 +784,9 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
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break;
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}
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SetDebugLoc(BI, SDB, FastIS, MF);
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// Try to select the instruction with FastISel.
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if (FastIS->SelectInstruction(BI)) {
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ResetDebugLoc(SDB, FastIS);
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if (FastIS->SelectInstruction(BI))
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continue;
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}
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// Clear out the debug location so that it doesn't carry over to
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// unrelated instructions.
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ResetDebugLoc(SDB, FastIS);
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// Then handle certain instructions as single-LLVM-Instruction blocks.
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if (isa<CallInst>(BI)) {
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