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[AMDGPU][MC] Corrected dst/data size for MIMG opcodes with d16 modifier
See bug 36154: https://bugs.llvm.org/show_bug.cgi?id=36154 Differential Revision: https://reviews.llvm.org/D42847 Reviewers: cfang, artem.tamazov, arsenm llvm-svn: 324237
This commit is contained in:
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@ -911,6 +911,10 @@ public:
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return AMDGPU::hasMIMG_R128(getSTI());
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}
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bool hasPackedD16() const {
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return AMDGPU::hasPackedD16(getSTI());
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}
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bool isSI() const {
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return AMDGPU::isSI(getSTI());
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}
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@ -2309,7 +2313,12 @@ bool AMDGPUAsmParser::validateMIMGDataSize(const MCInst &Inst) {
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if (DMask == 0)
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DMask = 1;
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return (VDataSize / 4) == countPopulation(DMask) + TFESize;
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unsigned DataSize = countPopulation(DMask);
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if ((Desc.TSFlags & SIInstrFlags::D16) != 0 && hasPackedD16()) {
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DataSize = (DataSize + 1) / 2;
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}
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return (VDataSize / 4) == DataSize + TFESize;
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}
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bool AMDGPUAsmParser::validateMIMGAtomicDMask(const MCInst &Inst) {
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@ -2378,16 +2387,6 @@ bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst,
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"integer clamping is not supported on this GPU");
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return false;
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}
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if (!validateMIMGDataSize(Inst)) {
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Error(IDLoc,
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"image data size does not match dmask and tfe");
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return false;
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}
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if (!validateMIMGAtomicDMask(Inst)) {
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Error(IDLoc,
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"invalid atomic image dmask");
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return false;
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}
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if (!validateMIMGR128(Inst)) {
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Error(IDLoc,
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"r128 modifier is not supported on this GPU");
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@ -2399,6 +2398,16 @@ bool AMDGPUAsmParser::validateInstruction(const MCInst &Inst,
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"d16 modifier is not supported on this GPU");
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return false;
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}
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if (!validateMIMGDataSize(Inst)) {
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Error(IDLoc,
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"image data size does not match dmask and tfe");
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return false;
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}
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if (!validateMIMGAtomicDMask(Inst)) {
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Error(IDLoc,
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"invalid atomic image dmask");
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return false;
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}
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return true;
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}
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@ -269,6 +269,9 @@ DecodeStatus AMDGPUDisassembler::convertSDWAInst(MCInst &MI) const {
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return MCDisassembler::Success;
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}
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// Note that MIMG format provides no information about VADDR size.
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// Consequently, decoded instructions always show address
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// as if it has 1 dword, which could be not really so.
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DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const {
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int VDstIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
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AMDGPU::OpName::vdst);
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@ -279,8 +282,12 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const {
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int DMaskIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
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AMDGPU::OpName::dmask);
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int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
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AMDGPU::OpName::tfe);
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assert(VDataIdx != -1);
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assert(DMaskIdx != -1);
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assert(TFEIdx != -1);
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bool isAtomic = (VDstIdx != -1);
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@ -288,19 +295,28 @@ DecodeStatus AMDGPUDisassembler::convertMIMGInst(MCInst &MI) const {
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if (DMask == 0)
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return MCDisassembler::Success;
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unsigned ChannelCount = countPopulation(DMask);
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if (ChannelCount == 1)
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unsigned DstSize = countPopulation(DMask);
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if (DstSize == 1)
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return MCDisassembler::Success;
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bool D16 = MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::D16;
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if (D16 && AMDGPU::hasPackedD16(STI)) {
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DstSize = (DstSize + 1) / 2;
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}
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// FIXME: Add tfe support
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if (MI.getOperand(TFEIdx).getImm())
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return MCDisassembler::Success;
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int NewOpcode = -1;
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if (isAtomic) {
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if (DMask == 0x1 || DMask == 0x3 || DMask == 0xF) {
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NewOpcode = AMDGPU::getMaskedMIMGAtomicOp(*MCII, MI.getOpcode(), ChannelCount);
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NewOpcode = AMDGPU::getMaskedMIMGAtomicOp(*MCII, MI.getOpcode(), DstSize);
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}
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if (NewOpcode == -1) return MCDisassembler::Success;
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} else {
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NewOpcode = AMDGPU::getMaskedMIMGOp(*MCII, MI.getOpcode(), ChannelCount);
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NewOpcode = AMDGPU::getMaskedMIMGOp(*MCII, MI.getOpcode(), DstSize);
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assert(NewOpcode != -1 && "could not find matching mimg channel instruction");
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}
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@ -628,6 +628,10 @@ bool hasMIMG_R128(const MCSubtargetInfo &STI) {
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return STI.getFeatureBits()[AMDGPU::FeatureMIMG_R128];
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}
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bool hasPackedD16(const MCSubtargetInfo &STI) {
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return !STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem];
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}
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bool isSI(const MCSubtargetInfo &STI) {
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return STI.getFeatureBits()[AMDGPU::FeatureSouthernIslands];
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}
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@ -284,8 +284,8 @@ inline bool isKernel(CallingConv::ID CC) {
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}
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bool hasXNACK(const MCSubtargetInfo &STI);
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bool hasMIMG_R128(const MCSubtargetInfo &STI);
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bool hasPackedD16(const MCSubtargetInfo &STI);
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bool isSI(const MCSubtargetInfo &STI);
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bool isCI(const MCSubtargetInfo &STI);
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@ -1,13 +1,15 @@
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// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=SICIVI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89 --check-prefix=GFX8_0
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89 --check-prefix=GFX8_1
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=GFX9 --check-prefix=GFX89
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// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICIVI --check-prefix=VI --check-prefix=GFX89
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// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
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// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI --check-prefix=NOGFX8_0
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI --check-prefix=NOGFX8_1
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGFX9
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//===----------------------------------------------------------------------===//
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@ -63,6 +65,80 @@ image_store v5, v[1:4], s[8:15] r128
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// SICIVI: image_store v5, v[1:4], s[8:15] r128 ; encoding: [0x00,0x80,0x20,0xf0,0x01,0x05,0x02,0x00]
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// NOGFX9: error: r128 modifier is not supported on this GPU
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//===----------------------------------------------------------------------===//
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// Image Load/Store: d16 unpacked
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//===----------------------------------------------------------------------===//
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image_load v[5:6], v[1:4], s[8:15] dmask:0x3 d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX8_0: image_load v[5:6], v[1:4], s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x01,0x05,0x02,0x80]
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// NOGFX8_1: error: image data size does not match dmask and tfe
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// NOGFX9: error: image data size does not match dmask and tfe
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image_load v[5:7], v[1:4], s[8:15] dmask:0x7 d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX8_0: image_load v[5:7], v[1:4], s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x01,0x05,0x02,0x80]
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// NOGFX8_1: error: image data size does not match dmask and tfe
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// NOGFX9: error: image data size does not match dmask and tfe
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image_load v[5:8], v[1:4], s[8:15] dmask:0xf d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX8_0: image_load v[5:8], v[1:4], s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x01,0x05,0x02,0x80]
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// NOGFX8_1: error: image data size does not match dmask and tfe
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// NOGFX9: error: image data size does not match dmask and tfe
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image_load v[5:7], v[1:4], s[8:15] dmask:0x3 tfe d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX8_0: image_load v[5:7], v[1:4], s[8:15] dmask:0x3 tfe d16 ; encoding: [0x00,0x03,0x01,0xf0,0x01,0x05,0x02,0x80]
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// NOGFX8_1: error: image data size does not match dmask and tfe
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// NOGFX9: error: image data size does not match dmask and tfe
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image_load v[5:8], v[1:4], s[8:15] dmask:0x7 tfe d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX8_0: image_load v[5:8], v[1:4], s[8:15] dmask:0x7 tfe d16 ; encoding: [0x00,0x07,0x01,0xf0,0x01,0x05,0x02,0x80]
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// NOGFX8_1: error: image data size does not match dmask and tfe
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// NOGFX9: error: image data size does not match dmask and tfe
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//===----------------------------------------------------------------------===//
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// Image Load/Store: d16 packed
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//===----------------------------------------------------------------------===//
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image_load v5, v[1:4], s[8:15] dmask:0x3 d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_load v5, v[1:4], s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x01,0x05,0x02,0x80]
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// GFX9: image_load v5, v[1:4], s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x01,0x05,0x02,0x80]
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image_load v[5:6], v[1:4], s[8:15] dmask:0x7 d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_load v[5:6], v[1:4], s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x01,0x05,0x02,0x80]
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// GFX9: image_load v[5:6], v[1:4], s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x01,0x05,0x02,0x80]
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image_load v[5:6], v[1:4], s[8:15] dmask:0xf d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_load v[5:6], v[1:4], s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x01,0x05,0x02,0x80]
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// GFX9: image_load v[5:6], v[1:4], s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x01,0x05,0x02,0x80]
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image_load v[5:6], v[1:4], s[8:15] dmask:0x3 tfe d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_load v[5:6], v[1:4], s[8:15] dmask:0x3 tfe d16 ; encoding: [0x00,0x03,0x01,0xf0,0x01,0x05,0x02,0x80]
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// GFX9: image_load v[5:6], v[1:4], s[8:15] dmask:0x3 tfe d16 ; encoding: [0x00,0x03,0x01,0xf0,0x01,0x05,0x02,0x80]
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image_load v[5:7], v[1:4], s[8:15] dmask:0x7 tfe d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_load v[5:7], v[1:4], s[8:15] dmask:0x7 tfe d16 ; encoding: [0x00,0x07,0x01,0xf0,0x01,0x05,0x02,0x80]
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// GFX9: image_load v[5:7], v[1:4], s[8:15] dmask:0x7 tfe d16 ; encoding: [0x00,0x07,0x01,0xf0,0x01,0x05,0x02,0x80]
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image_load v[5:7], v[1:4], s[8:15] dmask:0xf tfe d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_load v[5:7], v[1:4], s[8:15] dmask:0xf tfe d16 ; encoding: [0x00,0x0f,0x01,0xf0,0x01,0x05,0x02,0x80]
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// GFX9: image_load v[5:7], v[1:4], s[8:15] dmask:0xf tfe d16 ; encoding: [0x00,0x0f,0x01,0xf0,0x01,0x05,0x02,0x80]
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//===----------------------------------------------------------------------===//
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// Image Sample
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//===----------------------------------------------------------------------===//
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@ -85,6 +161,26 @@ image_sample v193, v[237:240], s[28:35], s[4:7] d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX89: image_sample v193, v[237:240], s[28:35], s[4:7] d16 ; encoding: [0x00,0x00,0x80,0xf0,0xed,0xc1,0x27,0x80]
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//===----------------------------------------------------------------------===//
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// Image Sample: d16 packed
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//===----------------------------------------------------------------------===//
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image_sample v[193:195], v[237:240], s[28:35], s[4:7] dmask:0x7 d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// GFX8_0: image_sample v[193:195], v[237:240], s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
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// NOGFX8_1: error: image data size does not match dmask and tfe
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// NOGFX9: error: image data size does not match dmask and tfe
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//===----------------------------------------------------------------------===//
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// Image Sample: d16 unpacked
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//===----------------------------------------------------------------------===//
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image_sample v[193:194], v[237:240], s[28:35], s[4:7] dmask:0x7 d16
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// NOSICI: error: d16 modifier is not supported on this GPU
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// NOGFX8_0: error: image data size does not match dmask and tfe
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// GFX8_1: image_sample v[193:194], v[237:240], s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
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// GFX9: image_sample v[193:194], v[237:240], s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
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//===----------------------------------------------------------------------===//
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// Image Atomics
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//===----------------------------------------------------------------------===//
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@ -1,4 +1,5 @@
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# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck -check-prefix=VI %s
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# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX80
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# RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI -check-prefix=GFX81
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#===------------------------------------------------------------------------===#
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# Image load/store
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@ -48,6 +49,53 @@
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# VI: image_load v255, v0, s[0:7] dmask:0x3 unorm ; encoding: [0x00,0x13,0x00,0xf0,0x00,0xff,0x00,0x00]
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0x00 0x13 0x00 0xf0 0x00 0xff 0x00 0x00
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#===------------------------------------------------------------------------===#
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# Image load/store: packed/unpacked d16
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#===------------------------------------------------------------------------===#
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# GFX80: image_load v[0:1], v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x04,0x00,0x02,0x80]
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# GFX81: image_load v0, v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x00,0xf0,0x04,0x00,0x02,0x80]
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0x00,0x03,0x00,0xf0,0x04,0x00,0x02,0x80
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# GFX80: image_load v[0:2], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x04,0x00,0x02,0x80]
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# GFX81: image_load v[0:1], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x00,0xf0,0x04,0x00,0x02,0x80]
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0x00,0x07,0x00,0xf0,0x04,0x00,0x02,0x80
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# GFX80: image_load v[0:3], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x04,0x00,0x02,0x80]
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# GFX81: image_load v[0:1], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x00,0xf0,0x04,0x00,0x02,0x80]
|
||||
0x00,0x0f,0x00,0xf0,0x04,0x00,0x02,0x80
|
||||
|
||||
# GFX80: image_store v[0:1], v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x20,0xf0,0x04,0x00,0x02,0x80]
|
||||
# GFX81: image_store v0, v4, s[8:15] dmask:0x3 d16 ; encoding: [0x00,0x03,0x20,0xf0,0x04,0x00,0x02,0x80]
|
||||
0x00,0x03,0x20,0xf0,0x04,0x00,0x02,0x80
|
||||
|
||||
# GFX80: image_store v[0:2], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x20,0xf0,0x04,0x00,0x02,0x80]
|
||||
# GFX81: image_store v[0:1], v4, s[8:15] dmask:0x7 d16 ; encoding: [0x00,0x07,0x20,0xf0,0x04,0x00,0x02,0x80]
|
||||
0x00,0x07,0x20,0xf0,0x04,0x00,0x02,0x80
|
||||
|
||||
# GFX80: image_store v[0:3], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x20,0xf0,0x04,0x00,0x02,0x80]
|
||||
# GFX81: image_store v[0:1], v4, s[8:15] dmask:0xf d16 ; encoding: [0x00,0x0f,0x20,0xf0,0x04,0x00,0x02,0x80]
|
||||
0x00,0x0f,0x20,0xf0,0x04,0x00,0x02,0x80
|
||||
|
||||
#===------------------------------------------------------------------------===#
|
||||
# Image sample
|
||||
#===------------------------------------------------------------------------===#
|
||||
|
||||
# VI: image_sample v[193:195], v237, s[28:35], s[4:7] dmask:0x7 unorm ; encoding: [0x00,0x17,0x80,0xf0,0xed,0xc1,0x27,0x00]
|
||||
0x00,0x17,0x80,0xf0,0xed,0xc1,0x27,0x00
|
||||
|
||||
# GFX80: image_sample v[193:194], v237, s[28:35], s[4:7] dmask:0x3 d16 ; encoding: [0x00,0x03,0x80,0xf0,0xed,0xc1,0x27,0x80]
|
||||
# GFX81: image_sample v193, v237, s[28:35], s[4:7] dmask:0x3 d16 ; encoding: [0x00,0x03,0x80,0xf0,0xed,0xc1,0x27,0x80]
|
||||
0x00,0x03,0x80,0xf0,0xed,0xc1,0x27,0x80
|
||||
|
||||
# GFX80: image_sample v[193:195], v237, s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
|
||||
# GFX81: image_sample v[193:194], v237, s[28:35], s[4:7] dmask:0x7 d16 ; encoding: [0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80]
|
||||
0x00,0x07,0x80,0xf0,0xed,0xc1,0x27,0x80
|
||||
|
||||
# GFX80: image_sample v[193:196], v237, s[28:35], s[4:7] dmask:0xf d16 ; encoding: [0x00,0x0f,0x80,0xf0,0xed,0xc1,0x27,0x80]
|
||||
# GFX81: image_sample v[193:194], v237, s[28:35], s[4:7] dmask:0xf d16 ; encoding: [0x00,0x0f,0x80,0xf0,0xed,0xc1,0x27,0x80]
|
||||
0x00,0x0f,0x80,0xf0,0xed,0xc1,0x27,0x80
|
||||
|
||||
#===------------------------------------------------------------------------===#
|
||||
# Image atomics
|
||||
#===------------------------------------------------------------------------===#
|
||||
|
Loading…
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Reference in New Issue
Block a user