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AMDGPU/GlobalISel: Improve icmp selection coverage.
Select s64 eq/ne scalar icmp. llvm-svn: 364765
This commit is contained in:
Matt Arsenault
parent
17c42f7e75
commit
e92f13d0b6
@ -317,8 +317,9 @@ bool AMDGPUInstructionSelector::selectG_INTRINSIC(MachineInstr &I,
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return false;
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}
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static unsigned getV_CMPOpcode(CmpInst::Predicate P, unsigned Size) {
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assert(Size == 32 || Size == 64);
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static int getV_CMPOpcode(CmpInst::Predicate P, unsigned Size) {
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if (Size != 32 && Size != 64)
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return -1;
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switch (P) {
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default:
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llvm_unreachable("Unknown condition code!");
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@ -345,12 +346,26 @@ static unsigned getV_CMPOpcode(CmpInst::Predicate P, unsigned Size) {
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}
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}
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static unsigned getS_CMPOpcode(CmpInst::Predicate P, unsigned Size) {
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// FIXME: VI supports 64-bit comparse.
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assert(Size == 32);
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int AMDGPUInstructionSelector::getS_CMPOpcode(CmpInst::Predicate P,
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unsigned Size) const {
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if (Size == 64) {
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if (!STI.hasScalarCompareEq64())
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return -1;
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switch (P) {
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case CmpInst::ICMP_NE:
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return AMDGPU::S_CMP_LG_U64;
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case CmpInst::ICMP_EQ:
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return AMDGPU::S_CMP_EQ_U64;
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default:
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return -1;
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}
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}
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if (Size != 32)
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return -1;
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switch (P) {
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default:
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llvm_unreachable("Unknown condition code!");
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case CmpInst::ICMP_NE:
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return AMDGPU::S_CMP_LG_U32;
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case CmpInst::ICMP_EQ:
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@ -371,6 +386,8 @@ static unsigned getS_CMPOpcode(CmpInst::Predicate P, unsigned Size) {
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return AMDGPU::S_CMP_LT_U32;
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case CmpInst::ICMP_ULE:
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return AMDGPU::S_CMP_LE_U32;
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default:
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llvm_unreachable("Unknown condition code!");
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}
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}
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@ -382,12 +399,14 @@ bool AMDGPUInstructionSelector::selectG_ICMP(MachineInstr &I) const {
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unsigned SrcReg = I.getOperand(2).getReg();
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unsigned Size = RBI.getSizeInBits(SrcReg, MRI, TRI);
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// FIXME: VI supports 64-bit compares.
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assert(Size == 32);
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auto Pred = (CmpInst::Predicate)I.getOperand(1).getPredicate();
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unsigned CCReg = I.getOperand(0).getReg();
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if (isSCC(CCReg, MRI)) {
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unsigned Opcode = getS_CMPOpcode((CmpInst::Predicate)I.getOperand(1).getPredicate(), Size);
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int Opcode = getS_CMPOpcode(Pred, Size);
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if (Opcode == -1)
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return false;
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MachineInstr *ICmp = BuildMI(*BB, &I, DL, TII.get(Opcode))
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.add(I.getOperand(2))
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.add(I.getOperand(3));
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@ -400,8 +419,10 @@ bool AMDGPUInstructionSelector::selectG_ICMP(MachineInstr &I) const {
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return Ret;
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}
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assert(Size == 32 || Size == 64);
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unsigned Opcode = getV_CMPOpcode((CmpInst::Predicate)I.getOperand(1).getPredicate(), Size);
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int Opcode = getV_CMPOpcode(Pred, Size);
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if (Opcode == -1)
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return false;
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MachineInstr *ICmp = BuildMI(*BB, &I, DL, TII.get(Opcode),
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I.getOperand(0).getReg())
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.add(I.getOperand(2))
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@ -984,7 +1005,9 @@ bool AMDGPUInstructionSelector::select(MachineInstr &I,
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case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:
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return selectG_INTRINSIC_W_SIDE_EFFECTS(I, CoverageInfo);
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case TargetOpcode::G_ICMP:
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return selectG_ICMP(I);
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if (selectG_ICMP(I))
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return true;
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return selectImpl(I, CoverageInfo);
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case TargetOpcode::G_LOAD:
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if (selectImpl(I, CoverageInfo))
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return true;
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@ -18,6 +18,7 @@
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
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#include "llvm/IR/InstrTypes.h"
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namespace {
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#define GET_GLOBALISEL_PREDICATE_BITSET
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@ -74,6 +75,7 @@ private:
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bool selectG_INTRINSIC(MachineInstr &I, CodeGenCoverage &CoverageInfo) const;
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bool selectG_INTRINSIC_W_SIDE_EFFECTS(MachineInstr &I,
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CodeGenCoverage &CoverageInfo) const;
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int getS_CMPOpcode(CmpInst::Predicate P, unsigned Size) const;
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bool selectG_ICMP(MachineInstr &I) const;
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bool hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const;
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void getAddrModeInfo(const MachineInstr &Load, const MachineRegisterInfo &MRI,
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595
test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s64.mir
Normal file
595
test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s64.mir
Normal file
@ -0,0 +1,595 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -pass-remarks-missed='gisel*' -global-isel-abort=2 -o - %s 2> %t | FileCheck -check-prefix=GFX8 %s
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# RUN: FileCheck -check-prefixes=ERR,GFX8-ERR %s < %t
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# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' -o - %s 2> %t | FileCheck -check-prefix=GFX6 %s
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# RUN: FileCheck -check-prefixes=ERR,GFX6-ERR %s < %t
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# ERR-NOT: remark
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# GFX6-ERR: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(eq), %0:sgpr(s64), %1:sgpr (in function: icmp_eq_s64_ss)
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# GFX6-ERR-NEXT: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(ne), %0:sgpr(s64), %1:sgpr (in function: icmp_ne_s64_ss)
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# GFX6-ERR-NEXT: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(slt), %0:sgpr(s64), %1:sgpr (in function: icmp_slt_s64_ss)
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# GFX6-ERR-NEXT: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(eq), %0:sgpr(p0), %1:sgpr (in function: icmp_eq_p0_ss)
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# GFX6-ERR-NEXT: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(eq), %0:sgpr(p1), %1:sgpr (in function: icmp_eq_p1_ss)
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# GFX6-ERR-NEXT: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(eq), %0:sgpr(p999), %1:sgpr (in function: icmp_eq_p999_ss)
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# GFX8-ERR: remark: <unknown>:0:0: cannot select: %2:scc(s1) = G_ICMP intpred(slt), %0:sgpr(s64), %1:sgpr (in function: icmp_slt_s64_ss)
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# ERR-NOT: remark
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---
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name: icmp_eq_s64_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; GFX8-LABEL: name: icmp_eq_s64_ss
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; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX8: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; GFX8: S_CMP_EQ_U64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX8: $scc = COPY [[COPY2]]
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; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1, implicit $scc
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; GFX8: S_ENDPGM 0, implicit [[S_CSELECT_B32_]]
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; GFX6-LABEL: name: icmp_eq_s64_ss
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; GFX6: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; GFX6: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
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; GFX6: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
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; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
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; GFX6: $scc = COPY [[COPY2]]
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; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
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; GFX6: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = COPY $sgpr2_sgpr3
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%2:scc(s1) = G_ICMP intpred(eq), %0, %1
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%3:sgpr(s32) = G_ZEXT %2
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S_ENDPGM 0, implicit %3
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...
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---
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name: icmp_ne_s64_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; GFX8-LABEL: name: icmp_ne_s64_ss
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; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
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; GFX8: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
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; GFX8: S_CMP_LG_U64 [[COPY]], [[COPY1]], implicit-def $scc
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; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
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; GFX8: $scc = COPY [[COPY2]]
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; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1, implicit $scc
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; GFX8: S_ENDPGM 0, implicit [[S_CSELECT_B32_]]
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; GFX6-LABEL: name: icmp_ne_s64_ss
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; GFX6: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; GFX6: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
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; GFX6: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
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; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
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; GFX6: $scc = COPY [[COPY2]]
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; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
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; GFX6: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = COPY $sgpr2_sgpr3
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%2:scc(s1) = G_ICMP intpred(ne), %0, %1
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%3:sgpr(s32) = G_ZEXT %2
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S_ENDPGM 0, implicit %3
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...
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---
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name: icmp_slt_s64_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
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; GFX8-LABEL: name: icmp_slt_s64_ss
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; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; GFX8: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
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; GFX8: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
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; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
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; GFX8: $scc = COPY [[COPY2]]
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; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
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; GFX8: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
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; GFX6-LABEL: name: icmp_slt_s64_ss
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; GFX6: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
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; GFX6: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
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; GFX6: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
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; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
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; GFX6: $scc = COPY [[COPY2]]
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; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
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; GFX6: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
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%0:sgpr(s64) = COPY $sgpr0_sgpr1
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%1:sgpr(s64) = COPY $sgpr2_sgpr3
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%2:scc(s1) = G_ICMP intpred(slt), %0, %1
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%3:sgpr(s32) = G_ZEXT %2
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S_ENDPGM 0, implicit %3
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...
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---
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name: icmp_eq_s64_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; GFX8-LABEL: name: icmp_eq_s64_vv
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GFX8: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
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; GFX6-LABEL: name: icmp_eq_s64_vv
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; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GFX6: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
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; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
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%0:vgpr(s64) = COPY $vgpr0_vgpr1
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%1:vgpr(s64) = COPY $vgpr2_vgpr3
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%2:vcc(s1) = G_ICMP intpred(eq), %0, %1
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%3:vgpr(s32) = G_ZEXT %2
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S_ENDPGM 0, implicit %3
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...
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---
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name: icmp_ne_s64_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; GFX8-LABEL: name: icmp_ne_s64_vv
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GFX8: [[V_CMP_NE_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U64_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_NE_U64_e64_]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
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; GFX6-LABEL: name: icmp_ne_s64_vv
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; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GFX6: [[V_CMP_NE_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U64_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_NE_U64_e64_]], implicit $exec
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; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
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%0:vgpr(s64) = COPY $vgpr0_vgpr1
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%1:vgpr(s64) = COPY $vgpr2_vgpr3
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%2:vcc(s1) = G_ICMP intpred(ne), %0, %1
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%3:vgpr(s32) = G_ZEXT %2
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S_ENDPGM 0, implicit %3
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...
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---
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name: icmp_sgt_s64_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; GFX8-LABEL: name: icmp_sgt_s64_vv
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; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
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; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
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; GFX8: [[V_CMP_GT_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GT_I64_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GT_I64_e64_]], implicit $exec
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; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
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; GFX6-LABEL: name: icmp_sgt_s64_vv
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; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_GT_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GT_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GT_I64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(sgt), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_sge_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_sge_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_GE_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GE_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GE_I64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_sge_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_GE_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GE_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GE_I64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(sge), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_slt_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_slt_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_LT_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LT_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LT_I64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_slt_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_LT_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LT_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LT_I64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(slt), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_sle_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_sle_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_LE_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LE_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LE_I64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_sle_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_LE_I64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LE_I64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LE_I64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(sle), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_ugt_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_ugt_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_GT_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GT_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GT_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_ugt_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_GT_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GT_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GT_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(ugt), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_uge_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_uge_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_GE_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GE_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GE_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_uge_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_GE_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_GE_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_GE_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(uge), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_ult_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_ult_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_LT_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LT_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LT_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_ult_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_LT_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LT_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LT_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(ult), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_ule_s64_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_ule_s64_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_LE_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LE_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LE_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_ule_s64_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_LE_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_LE_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_LE_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(s64) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(ule), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_eq_p0_ss
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_eq_p0_ss
|
||||
; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; GFX8: S_CMP_EQ_U64 [[COPY]], [[COPY1]], implicit-def $scc
|
||||
; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
||||
; GFX8: $scc = COPY [[COPY2]]
|
||||
; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1, implicit $scc
|
||||
; GFX8: S_ENDPGM 0, implicit [[S_CSELECT_B32_]]
|
||||
; GFX6-LABEL: name: icmp_eq_p0_ss
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(p0) = COPY $sgpr0_sgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(p0) = COPY $sgpr2_sgpr3
|
||||
; GFX6: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](p0), [[COPY1]]
|
||||
; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
|
||||
; GFX6: $scc = COPY [[COPY2]]
|
||||
; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
|
||||
; GFX6: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
|
||||
%0:sgpr(p0) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(p0) = COPY $sgpr2_sgpr3
|
||||
%2:scc(s1) = G_ICMP intpred(eq), %0, %1
|
||||
%3:sgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_eq_p1_ss
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_eq_p1_ss
|
||||
; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; GFX8: S_CMP_EQ_U64 [[COPY]], [[COPY1]], implicit-def $scc
|
||||
; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
||||
; GFX8: $scc = COPY [[COPY2]]
|
||||
; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1, implicit $scc
|
||||
; GFX8: S_ENDPGM 0, implicit [[S_CSELECT_B32_]]
|
||||
; GFX6-LABEL: name: icmp_eq_p1_ss
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(p1) = COPY $sgpr0_sgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(p1) = COPY $sgpr2_sgpr3
|
||||
; GFX6: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](p1), [[COPY1]]
|
||||
; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
|
||||
; GFX6: $scc = COPY [[COPY2]]
|
||||
; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
|
||||
; GFX6: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
|
||||
%0:sgpr(p1) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(p1) = COPY $sgpr2_sgpr3
|
||||
%2:scc(s1) = G_ICMP intpred(eq), %0, %1
|
||||
%3:sgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_eq_p999_ss
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_eq_p999_ss
|
||||
; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3
|
||||
; GFX8: S_CMP_EQ_U64 [[COPY]], [[COPY1]], implicit-def $scc
|
||||
; GFX8: [[COPY2:%[0-9]+]]:sreg_32 = COPY $scc
|
||||
; GFX8: $scc = COPY [[COPY2]]
|
||||
; GFX8: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 0, 1, implicit $scc
|
||||
; GFX8: S_ENDPGM 0, implicit [[S_CSELECT_B32_]]
|
||||
; GFX6-LABEL: name: icmp_eq_p999_ss
|
||||
; GFX6: [[COPY:%[0-9]+]]:sgpr(p999) = COPY $sgpr0_sgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:sgpr(p999) = COPY $sgpr2_sgpr3
|
||||
; GFX6: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](p999), [[COPY1]]
|
||||
; GFX6: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[ICMP]](s1)
|
||||
; GFX6: $scc = COPY [[COPY2]]
|
||||
; GFX6: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32(s32) = S_CSELECT_B32 0, 1, implicit $scc
|
||||
; GFX6: S_ENDPGM 0, implicit [[S_CSELECT_B32_]](s32)
|
||||
%0:sgpr(p999) = COPY $sgpr0_sgpr1
|
||||
%1:sgpr(p999) = COPY $sgpr2_sgpr3
|
||||
%2:scc(s1) = G_ICMP intpred(eq), %0, %1
|
||||
%3:sgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_eq_p0_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_eq_p0_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_eq_p0_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(p0) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(p0) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(eq), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_eq_p1_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_eq_p1_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_eq_p1_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(p1) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(p1) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(eq), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: icmp_eq_p999_vv
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
|
||||
|
||||
; GFX8-LABEL: name: icmp_eq_p999_vv
|
||||
; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX8: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX8: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
|
||||
; GFX8: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
; GFX6-LABEL: name: icmp_eq_p999_vv
|
||||
; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; GFX6: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; GFX6: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GFX6: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[V_CMP_EQ_U64_e64_]], implicit $exec
|
||||
; GFX6: S_ENDPGM 0, implicit [[V_CNDMASK_B32_e64_]]
|
||||
%0:vgpr(p999) = COPY $vgpr0_vgpr1
|
||||
%1:vgpr(p999) = COPY $vgpr2_vgpr3
|
||||
%2:vcc(s1) = G_ICMP intpred(eq), %0, %1
|
||||
%3:vgpr(s32) = G_ZEXT %2
|
||||
S_ENDPGM 0, implicit %3
|
||||
|
||||
...
|
||||
Loading…
x
Reference in New Issue
Block a user