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@ -232,8 +232,8 @@ def NegImm32: SDNodeXForm<imm, [{
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def SplatB: SDNodeXForm<imm, [{
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uint32_t V = N->getZExtValue();
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assert(isUInt<8>(V) || V >> 8 == 0xFFFFFF);
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uint32_t S = V << 24 | V << 16 | V << 8 | V;
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V &= 0xFF;
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uint32_t S = V << 24 | V << 16 | V << 8 | V;
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return CurDAG->getTargetConstant(S, SDLoc(N), MVT::i32);
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}]>;
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16
test/CodeGen/Hexagon/isel-splat-vector-neg-i8.ll
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16
test/CodeGen/Hexagon/isel-splat-vector-neg-i8.ll
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@ -0,0 +1,16 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -march=hexagon < %s | FileCheck %s
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define <4 x i8> @fred() #0 {
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; CHECK-LABEL: fred:
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; CHECK: // %bb.0:
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; CHECK-NEXT: {
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; CHECK-NEXT: r0 = ##-16843010
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; CHECK-NEXT: jumpr r31
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; CHECK-NEXT: }
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%v0 = insertelement <4 x i8> undef, i8 -2, i32 0
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%v1 = shufflevector <4 x i8> %v0, <4 x i8> undef, <4 x i32> zeroinitializer
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ret <4 x i8> %v1
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}
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attributes #0 = { nounwind readnone }
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