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[SelectionDAG] Make ISD::isConstantSplatVector always return an element sized APInt.
This partially reverts r311429 in favor of making ISD::isConstantSplatVector do something not confusing. Turns out the only other user of it was also having to deal with the weird property of it returning a smaller size. So rather than continue to deal with this quirk everywhere, just make the interface do something sane. Differential Revision: https://reviews.llvm.org/D37039 llvm-svn: 311510
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@ -85,10 +85,7 @@ namespace ISD {
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/// If N is a BUILD_VECTOR node whose elements are all the same constant or
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/// undefined, return true and return the constant value in \p SplatValue.
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/// This sets \p SplatValue to the smallest possible splat unless AllowShrink
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/// is set to false.
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bool isConstantSplatVector(const SDNode *N, APInt &SplatValue,
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bool AllowShrink = true);
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bool isConstantSplatVector(const SDNode *N, APInt &SplatValue);
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/// Return true if the specified node is a BUILD_VECTOR where all of the
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/// elements are ~0 or undef.
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@ -2588,6 +2588,12 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
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N0IsConst = ISD::isConstantSplatVector(N0.getNode(), ConstValue0);
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N1IsConst = ISD::isConstantSplatVector(N1.getNode(), ConstValue1);
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assert((!N0IsConst ||
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ConstValue0.getBitWidth() == VT.getScalarSizeInBits()) &&
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"Splat APInt should be element width");
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assert((!N1IsConst ||
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ConstValue1.getBitWidth() == VT.getScalarSizeInBits()) &&
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"Splat APInt should be element width");
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} else {
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N0IsConst = isa<ConstantSDNode>(N0);
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if (N0IsConst) {
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@ -2613,12 +2619,8 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
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// fold (mul x, 0) -> 0
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if (N1IsConst && ConstValue1.isNullValue())
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return N1;
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// We require a splat of the entire scalar bit width for non-contiguous
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// bit patterns.
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bool IsFullSplat =
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ConstValue1.getBitWidth() == VT.getScalarSizeInBits();
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// fold (mul x, 1) -> x
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if (N1IsConst && ConstValue1.isOneValue() && IsFullSplat)
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if (N1IsConst && ConstValue1.isOneValue())
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return N0;
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if (SDValue NewSel = foldBinOpIntoSelect(N))
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@ -2643,8 +2645,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
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return DAG.getNode(ISD::SHL, DL, VT, N0, Trunc);
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}
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// fold (mul x, -(1 << c)) -> -(x << c) or (-x) << c
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if (N1IsConst && !N1IsOpaqueConst && (-ConstValue1).isPowerOf2() &&
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IsFullSplat) {
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if (N1IsConst && !N1IsOpaqueConst && (-ConstValue1).isPowerOf2()) {
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unsigned Log2Val = (-ConstValue1).logBase2();
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SDLoc DL(N);
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// FIXME: If the input is something that is easily negated (e.g. a
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@ -125,8 +125,7 @@ bool ConstantFPSDNode::isValueValidForType(EVT VT,
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// ISD Namespace
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//===----------------------------------------------------------------------===//
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bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal,
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bool AllowShrink) {
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bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
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auto *BV = dyn_cast<BuildVectorSDNode>(N);
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if (!BV)
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return false;
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@ -135,10 +134,9 @@ bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal,
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unsigned SplatBitSize;
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bool HasUndefs;
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unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
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unsigned MinSplatBits = AllowShrink ? 0 : EltSize;
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return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs,
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MinSplatBits) &&
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EltSize >= SplatBitSize;
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EltSize) &&
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EltSize == SplatBitSize;
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}
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// FIXME: AllOnes and AllZeros duplicate a lot of code. Could these be
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@ -29567,8 +29567,7 @@ static bool detectZextAbsDiff(const SDValue &Select, SDValue &Op0,
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// In SetLT case, The second operand of the comparison can be either 1 or 0.
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APInt SplatVal;
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if ((CC == ISD::SETLT) &&
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!((ISD::isConstantSplatVector(SetCC.getOperand(1).getNode(), SplatVal,
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/*AllowShrink*/false) &&
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!((ISD::isConstantSplatVector(SetCC.getOperand(1).getNode(), SplatVal) &&
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SplatVal.isOneValue()) ||
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(ISD::isBuildVectorAllZeros(SetCC.getOperand(1).getNode()))))
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return false;
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@ -32084,8 +32083,7 @@ static SDValue combineAndMaskToShift(SDNode *N, SelectionDAG &DAG,
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return SDValue();
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APInt SplatVal;
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if (!ISD::isConstantSplatVector(Op1.getNode(), SplatVal,
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/*AllowShrink*/false) ||
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if (!ISD::isConstantSplatVector(Op1.getNode(), SplatVal) ||
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!SplatVal.isMask())
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return SDValue();
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@ -32669,8 +32667,7 @@ static SDValue detectUSatPattern(SDValue In, EVT VT) {
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"Unexpected types for truncate operation");
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APInt C;
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if (ISD::isConstantSplatVector(In.getOperand(1).getNode(), C,
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/*AllowShrink*/false)) {
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if (ISD::isConstantSplatVector(In.getOperand(1).getNode(), C)) {
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// C should be equal to UINT32_MAX / UINT16_MAX / UINT8_MAX according
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// the element size of the destination type.
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return C.isMask(VT.getScalarSizeInBits()) ? In.getOperand(0) :
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@ -35377,7 +35374,7 @@ static SDValue combineIncDecVector(SDNode *N, SelectionDAG &DAG) {
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SDNode *N1 = N->getOperand(1).getNode();
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APInt SplatVal;
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if (!ISD::isConstantSplatVector(N1, SplatVal, /*AllowShrink*/false) ||
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if (!ISD::isConstantSplatVector(N1, SplatVal) ||
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!SplatVal.isOneValue())
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return SDValue();
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