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[InstSimplify][InstCombine] don't crash when folding vector selects of icmp
Differential Revision: https://reviews.llvm.org/D22602 llvm-svn: 276209
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@ -3416,7 +3416,10 @@ static Value *simplifySelectWithICmpCond(Value *CondVal, Value *TrueVal,
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if (!match(CondVal, m_ICmp(Pred, m_Value(CmpLHS), m_Value(CmpRHS))))
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return nullptr;
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unsigned BitWidth = Q.DL.getTypeSizeInBits(TrueVal->getType());
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// FIXME: This code is nearly duplicated in InstCombine. Using/refactoring
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// decomposeBitTestICmp() might help.
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unsigned BitWidth =
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Q.DL.getTypeSizeInBits(TrueVal->getType()->getScalarType());
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APInt MinSignedValue = APInt::getSignBit(BitWidth);
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if (ICmpInst::isEquality(Pred) && match(CmpRHS, m_Zero())) {
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Value *X;
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@ -553,8 +553,11 @@ Instruction *InstCombiner::visitSelectInstWithICmp(SelectInst &SI,
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}
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}
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// FIXME: This code is nearly duplicated in InstSimplify. Using/refactoring
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// decomposeBitTestICmp() might help.
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{
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unsigned BitWidth = DL.getTypeSizeInBits(TrueVal->getType());
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unsigned BitWidth =
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DL.getTypeSizeInBits(TrueVal->getType()->getScalarType());
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APInt MinSignedValue = APInt::getSignBit(BitWidth);
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Value *X;
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const APInt *Y, *C;
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@ -1742,3 +1742,26 @@ define i32 @PR27137(i32 %a) {
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%s1 = select i1 %c1, i32 %s0, i32 -1
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ret i32 %s1
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}
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define i32 @select_icmp_slt0_xor(i32 %x) {
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; CHECK-LABEL: @select_icmp_slt0_xor(
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; CHECK-NEXT: [[TMP1:%.*]] = or i32 %x, -2147483648
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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%cmp = icmp slt i32 %x, zeroinitializer
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%xor = xor i32 %x, 2147483648
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%x.xor = select i1 %cmp, i32 %x, i32 %xor
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ret i32 %x.xor
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}
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define <2 x i32> @select_icmp_slt0_xor_vec(<2 x i32> %x) {
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; CHECK-LABEL: @select_icmp_slt0_xor_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> %x, <i32 -2147483648, i32 -2147483648>
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; CHECK-NEXT: ret <2 x i32> [[TMP1]]
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;
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%cmp = icmp slt <2 x i32> %x, zeroinitializer
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%xor = xor <2 x i32> %x, <i32 2147483648, i32 2147483648>
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%x.xor = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %xor
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ret <2 x i32> %x.xor
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}
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@ -119,6 +119,17 @@ define i32 @test11(i32 %X) {
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ret i32 %cond
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}
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define <2 x i8> @test11vec(<2 x i8> %X) {
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; CHECK-LABEL: @test11vec(
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; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> %X, <i8 127, i8 127>
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; CHECK-NEXT: ret <2 x i8> [[AND]]
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;
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%cmp = icmp sgt <2 x i8> %X, <i8 -1, i8 -1>
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%and = and <2 x i8> %X, <i8 127, i8 127>
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%sel = select <2 x i1> %cmp, <2 x i8> %X, <2 x i8> %and
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ret <2 x i8> %sel
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}
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define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) {
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; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8(
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; CHECK-NEXT: [[OR:%.*]] = or i32 %x, 8
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