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Make the global base reg GR32_NOSP.
It can sometimes be used in addressing modes that don't support %ESP. llvm-svn: 157165
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@ -3627,7 +3627,7 @@ unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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// Create the register. The code to initialize it is inserted
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// later, by the CGBR pass (below).
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MachineRegisterInfo &RegInfo = MF->getRegInfo();
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GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32RegClass);
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GlobalBaseReg = RegInfo.createVirtualRegister(&X86::GR32_NOSPRegClass);
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X86FI->setGlobalBaseReg(GlobalBaseReg);
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return GlobalBaseReg;
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}
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