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AMDGPU: Fix code size for return_to_epilog pseudo

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llvm-svn: 338113
This commit is contained in:
Matt Arsenault 2018-07-27 09:15:03 +00:00
parent bd3fad6e93
commit ea2d72ddd3
3 changed files with 10 additions and 3 deletions
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6
lib/Target/AMDGPU/SIInstrInfo.cpp
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@ -4753,12 +4753,12 @@ unsigned SIInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
if (DescSize != 0 && DescSize != 4)
return DescSize;
if (isFixedSize(MI))
return DescSize;
// 4-byte instructions may have a 32-bit literal encoded after them. Check
// operands that coud ever be literals.
if (isVALU(MI) || isSALU(MI)) {
if (isFixedSize(MI))
return DescSize;
int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);
if (Src0Idx == -1)
return 4; // No operands.

1
lib/Target/AMDGPU/SIInstructions.td
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@ -374,6 +374,7 @@ def SI_RETURN_TO_EPILOG : SPseudoInstSI <
let isReturn = 1;
let hasNoSchedulingInfo = 1;
let DisableWQM = 1;
let FixedSize = 1;
}
// Return for returning function calls.

6
test/CodeGen/AMDGPU/ret.ll
View File

@ -241,6 +241,12 @@ bb:
ret { { float, i32 }, { i32, <2 x float> } } { { float, i32 } { float 1.000000e+00, i32 2 }, { i32, <2 x float> } { i32 3, <2 x float> <float 2.000000e+00, float 4.000000e+00> } }
}
; GCN-LABEL: {{^}}ret_return_to_epilog_pseudo_size:
; GCN: codeLenInByte = 0{{$}}
define amdgpu_ps float @ret_return_to_epilog_pseudo_size() #0 {
ret float undef
}
declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
attributes #0 = { nounwind }