RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 12:43:36 +01:00
Code Issues Projects Releases Wiki Activity

[Hexagon] Simplify MCCodeEmitter, move data to tables

Browse Source 
llvm-svn: 331883
This commit is contained in:
Krzysztof Parzyszek 2018-05-09 15:02:04 +00:00
parent 64645f6c32
commit eb411966ec
2 changed files with 567 additions and 588 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1115
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
View File

File diff suppressed because it is too large Load Diff

40
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
View File

@ -35,26 +35,20 @@ class raw_ostream;
class HexagonMCCodeEmitter : public MCCodeEmitter {
MCContext &MCT;
MCInstrInfo const &MCII;
std::unique_ptr<unsigned> Addend;
std::unique_ptr<bool> Extended;
std::unique_ptr<bool> SubInst1;
std::unique_ptr<MCInst const *> CurrentBundle;
std::unique_ptr<size_t> CurrentIndex;
// helper routine for getMachineOpValue()
unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO,
const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
const MCOperand &MO,
const MCSymbolRefExpr::VariantKind kind) const;
// A mutable state of the emitter when encoding bundles and duplexes.
struct EmitterState {
unsigned Addend = 0;
bool Extended = false;
bool SubInst1 = false;
const MCInst *Bundle = nullptr;
size_t Index = 0;
};
mutable EmitterState State;
public:
HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT);
// Return parse bits for instruction `MCI' inside bundle `MCB'
uint32_t parseBits(size_t Last, MCInst const &MCB, MCInst const &MCI) const;
HexagonMCCodeEmitter(MCInstrInfo const &MII, MCContext &MCT)
: MCT(MCT), MCII(MII) {}
void encodeInstruction(MCInst const &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
@ -77,6 +71,18 @@ public:
MCSubtargetInfo const &STI) const;
private:
// helper routine for getMachineOpValue()
unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO,
const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
const MCOperand &MO,
const MCSymbolRefExpr::VariantKind Kind) const;
// Return parse bits for instruction `MCI' inside bundle `MCB'
uint32_t parseBits(size_t Last, MCInst const &MCB, MCInst const &MCI) const;
uint64_t computeAvailableFeatures(const FeatureBitset &FB) const;
void verifyInstructionPredicates(const MCInst &MI,
uint64_t AvailableFeatures) const;