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[RISCV] Replace map with set in getReqFeatures

Summary:
Use a set in getReqFeatures() in RISCVCompressInstEmitter instead of a map
because the index we save is not needed.

This also fixes bug 41666.

Reviewers: llvm-commits, apazos, asb, nickdesaulniers

Reviewed By: asb

Subscribers: Jim, nickdesaulniers, rbar, johnrusso, simoncook, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61412

llvm-svn: 362968
This commit is contained in:
Sameer AbuAsal 2019-06-10 17:15:45 +00:00
parent 172eece0ff
commit ebac1d7786

View File

@ -64,6 +64,7 @@
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
#include "llvm/TableGen/TableGenBackend.h"
#include <set>
#include <vector>
using namespace llvm;
@ -474,7 +475,7 @@ void RISCVCompressInstEmitter::evaluateCompressPat(Record *Rec) {
SourceOperandMap, DestOperandMap));
}
static void getReqFeatures(std::map<StringRef, int> &FeaturesMap,
static void getReqFeatures(std::set<StringRef> &FeaturesSet,
const std::vector<Record *> &ReqFeatures) {
for (auto &R : ReqFeatures) {
StringRef AsmCondString = R->getValueAsString("AssemblerCondString");
@ -483,11 +484,9 @@ static void getReqFeatures(std::map<StringRef, int> &FeaturesMap,
SmallVector<StringRef, 4> Ops;
SplitString(AsmCondString, Ops, ",");
assert(!Ops.empty() && "AssemblerCondString cannot be empty");
for (auto &Op : Ops) {
assert(!Op.empty() && "Empty operator");
if (FeaturesMap.find(Op) == FeaturesMap.end())
FeaturesMap[Op] = FeaturesMap.size();
FeaturesSet.insert(Op);
}
}
}
@ -620,9 +619,9 @@ void RISCVCompressInstEmitter::emitCompressInstEmitter(raw_ostream &o,
CaseStream.indent(4) << "case " + Namespace + "::" + CurOp + ": {\n";
}
std::map<StringRef, int> FeaturesMap;
std::set<StringRef> FeaturesSet;
// Add CompressPat required features.
getReqFeatures(FeaturesMap, CompressPat.PatReqFeatures);
getReqFeatures(FeaturesSet, CompressPat.PatReqFeatures);
// Add Dest instruction required features.
std::vector<Record *> ReqFeatures;
@ -630,11 +629,10 @@ void RISCVCompressInstEmitter::emitCompressInstEmitter(raw_ostream &o,
copy_if(RF, std::back_inserter(ReqFeatures), [](Record *R) {
return R->getValueAsBit("AssemblerMatcherPredicate");
});
getReqFeatures(FeaturesMap, ReqFeatures);
getReqFeatures(FeaturesSet, ReqFeatures);
// Emit checks for all required features.
for (auto &F : FeaturesMap) {
StringRef Op = F.first;
for (auto &Op : FeaturesSet) {
if (Op[0] == '!')
CondStream.indent(6) << ("!STI.getFeatureBits()[" + Namespace +
"::" + Op.substr(1) + "]")